ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 39

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ltc4268cdkd-1-trpbf

Manufacturer Part Number
ltc4268cdkd-1-trpbf
Description
High Power Pd With Synchronous Noopto Flyback Controller
Manufacturer
Linear Technology Corporation
Datasheet
Slope Compensation
The LTC4268-1 incorporates current slope compensation.
Slope compensation is required to ensure current loop
stability when the DC is greater than 50%. In some switching
regulators, slope compensation reduces the maximum peak
current at higher duty cycles. The LTC4268-1 eliminates
this problem by having circuitry that compensates for
the slope compensation so that maximum current sense
voltage is constant across all duty cycles.
Minimum Load Considerations
At light loads, the LTC4268-1 derived regulator goes into
forced continuous conduction mode. The primary side
switch always turns on for a short time as set by the
t
load requires, power will fl ow back into the primary during
the “off” period when the synchronization switch is on.
This does not produce any inherently adverse problems,
although light load effi ciency is reduced.
Maximum Load Considerations
The current mode control uses the V
and amplifi ed sense resistor voltage as inputs to the
current comparator. When the amplifi ed sense voltage
exceeds the V
is turned off.
In normal use, the peak switch current increases while
FB is below the internal reference. This continues until
V
MOSFET will turn off at the rated 100mV V
repeats on the next cycle. It is possible for the peak primary
switch currents as referred across R
max 100mV rating because of the minimum switch on
time blanking. If the voltage on V
after the minimum turn-on time, the SFST capacitor is
discharged, causing the discharge of the V
This then reduces the peak current on the next cycle and
will reduce overall stress in the primary switch.
APPLICATIONS INFORMATION
ON(MIN)
CMP
reaches its 2.56V clamp. At clamp, the primary side
resistor. If this produces more power than the
CMP
node voltage, the primary side switch
SENSE
SENSE
CMP
exceeds 205mV
SENSE
CMP
to exceed the
node voltage
level. This
capacitor.
Short-Circuit Conditions
Loss of current limit is possible under certain conditions
such as an output short circuit. If the duty cycle exhibited
by the minimum on time is greater than the ratio of
secondary winding voltage (referred-to-primary) divided
by input voltage, then peak current is not controlled at
the nominal value. It ratchets up cycle-by-cycle to some
higher level. Expressed mathematically, the requirement
to maintain short-circuit control is
where:
Trouble is typically encountered only in applications with a
relatively high product of input voltage times secondary to
primary turns ratio and/or a relatively long minimum switch
on time. Additionally, several real world effects such as
transformer leakage inductance, AC winding losses, and
output switch voltage drop combine to make this simple
theoretical calculation a conservative estimate. Prudent
design evaluates the switcher for short-circuit protection
and adds any additional circuitry to prevent destruction
for these losses.
Output Voltage Error Sources
The LTC4268-1’s feedback sensing introduces additional
minor sources of errors. The following is a summary
list.
• The internal bandgap voltage reference sets the reference
t
I
N
N
(Other variables as previously defi ned)
voltage for the feedback amplifi er. The specifi cations
detail its variation.
DC
ON(MIN)
SC
SP
PRI
MIN
is the short-circuit output current
is the secondary-to-primary turns ratio (N
)
=
is the primary side switch minimum on time
t
ON MIN
(
)
f
OSC
<
I
SC
(
R
V
LTC4268-1
SEC
IN
+
N
R
S S P
DS ON
(
)
39
SEC
)
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/

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