ltc6803g-3 Linear Technology Corporation, ltc6803g-3 Datasheet - Page 34

• Manufacturer Part Number: ltc6803g-3
• Description: Ltc6803-1/ltc6803-3 - Multicell Battery Stack Monitor
• Manufacturer: Linear Technology Corporation

LTC6803-1/LTC6803-3
APPLICATIONS INFORMATION
the resistive loading on the cell group when the IC enters
standby mode (i.e., when WDTB goes low). An LT6004
micropower operational amplifier section is shown for
buffering the divider signal to preserve accuracy. This
circuit has the virtue that it can be converted about four
times more frequently than the entire battery array, thus
offering a higher sample rate option at the expense of
some precision/accuracy, reserving the high resolution
cell readings for calibration and balancing data.
PROVIDING HIGH SPEED ISOLATION OF THE SPI DATA
PORT
Isolation techniques that are capable of supporting the
1Mbps data rate of the LTC6803 require more power on
the isolated (battery) side than can be furnished by the
V
this means that a DC/DC function must be implemented
34
REG
SPI_MASTEROUT
output of the LTC6803. To keep battery drain minimal,
SPI_CHIPSELECT
SPI_MASTERIN
SPI_CLOCK
GND_HOST
5V_HOST
470pF
20.0k
10.0k
100
100
1
2
3
4
IN1
GND1
IN2
GND2
LTC1693-2
100
100
1µF
OUT1
OUT2
V
V
CC1
CC2
1µF
Figure 22. Providing an Isolated High Speed Data Interface
8
7
6
5
1
2
3
4
5
6
7
8
33nF
QUAD ISOLATOR
V
GND1
A1
A2
A3
A4
EN1
GND1
Si8441AB-C-IS
DD1
PE-68386
GND2
GND2
1
3
V
•
EN2
DD2
B1
B2
B3
B4
•
6
4
16
15
14
13
12
11
10
9
BAT54S
along with a suitable data isolation circuit, such as shown
in Figure 22. A quad (3 + 1) data isolator Si8441AB-C-IS
is used to provide non-galvanic SPI signal connections
between a host microprocessor and an LTC6803. An
inexpensive isolated DC/DC converter provides power-
ing of the isolator function completely from the host 5V
power supply. A quad three-state buffer is used to allow
SPI inputs at the LTC6803 to rise to logic high level when
the isolator circuitry powers down, assuring the lowest
power consumption in the standby condition. The pull-
ups to V
V
thus balancing the current in all cells during operation.
The additional pull-up on the SDO line (1k resistor and
Schottky diode) is to improve rise time, in lower data-rate
applications this may not be needed.
12
REG
1µF
13
1/4 74ABT126
by ICs operating with a current mode SPI interface,
11
REG
are selected to match the internal loading on
1/4 74ABT126
2
74ABT126 SUPPLY SHARED WITH
1
ISOLATOR V
3
1/4 74ABT126
CMDSH2-3
5
4
DD2
6
1/4 74ABT126
and GND2
1k
8
10
9
4.22k
4.22k
4.22k
4.22k
680313 F22
V
SCKI
CSB1
SCI
SDO
V
REG
–
680313f