ltc6803g-3 Linear Technology Corporation, ltc6803g-3 Datasheet - Page 9

• Manufacturer Part Number: ltc6803g-3
• Description: Ltc6803-1/ltc6803-3 - Multicell Battery Stack Monitor
• Manufacturer: Linear Technology Corporation

PIN FUNCTIONS
To ensure pin compatibility with the LTC6802-1, the
LTC6803-1 is configured such that the bottom cell input
(C0) is connected internally to the negative supply voltage
(V
for the bottom cell (C0). This simple functional difference
offers the possibility for enhanced cell 1 measurement
accuracy, enhanced SPI noise tolerance and simplified
wiring. More information is provided in the applications
section entitled Advantages of Kelvin Connections for C0.
CSBO (Pin 1): Chip Select Output (Active Low). CSBO is
a buffered version of the chip select input, CSBI. CSBO
drives the next IC in the daisy chain. See Serial Port in the
Applications Information section.
SDOI (Pin 2): Serial Data I/O Pin. SDOI transfers data to
and from the next IC in the daisy chain. See Serial Port in
the Applications Information section.
SCKO (Pin 3): Serial Clock Output. SCKO is a buffered ver-
sion of SCKI. SCKO drives the next IC in the daisy chain.
See Serial Port in the Applications Information section.
V
most positive potential in the battery stack or an isolated
power supply. V
potential in the battery stack under normal operation. With
an isolated power supply, LTC6803 can be turned off by
simply shutting down V
C12, C11, C10, C9, C8, C7, C6, C5, C4, C3, C2, C1 (Pins
5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27): C1 through
C12 are the inputs for monitoring battery cell voltages. The
negative terminal of the bottom cell is tied to pin V
LTC6803-1, pin C0 for LTC6803-3 . The next lowest potential
is tied to C1 and so forth. See the figures in the Applica-
tions Information section for more details on connecting
batteries to the LTC6803-1 and LTC6803-3. The LTC6803
can monitor a series connection of up to 12 cells. Each
cell in a series connection must have a common mode
voltage that is greater than or equal to the cells below it.
100mV negative voltages are permitted.
+
–
(Pin 4): Positive Power Supply. Pin 4 can be tied to the
). The LTC6803-3 offers a unique pinout with an input
+
must be greater than the most positive
+
.
–
for
S12, S11, S10, S9, S8, S7, S6, S5, S4, S3, S2, S1 (Pins
6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28): S1 though
S12 pins are used to balance battery cells. If one cell in a
series becomes overcharged, an S output can be used to
discharge the cell. Each S output has an internal N-channel
MOSFET for discharging. See the Block Diagram. The
NMOS has a maximum on resistance of 20Ω. An external
resistor should be connected in series with the NMOS to
dissipate heat outside of the LTC6803 package. When
using the internal MOSFETs to discharge cells, the die
temperature should be monitored. See Power Dissipation
and Thermal Shutdown in the Applications Information
section. The S pins also feature an internal pull-up PMOS.
This allows the S pins to be used to drive the gates of
external MOSFETs for higher discharge capability.
C0 (Pin 29 on LTC6803-3): Negative Terminal of the Bot-
tom Battery Cell. C0 and V
eliminate effect of voltage drop at the V
V
V
NC (Pin 30 on LTC6803-1/Pin 31 on LTC6803-3 ): This pin
is not used and is internally connected to V
It can be left unconnected or connected to V
V
on LTC6803-3 ): Temperature Sensor Inputs. The ADC
measures the voltage on V
stores the result in the TMP registers. The ADC measure-
ments are relative to the V
simple thermistor and resistor combination connected
to the V
V
Any voltage from 0V to 5.125V referenced to V
measured.
V
Voltage Reference Output. This pin should be bypassed
with a 1µF capacitor. The V
tive load connected to V
with an LT6003 op amp, or similar device.
–
–
TEMP1
TEMP
REF
(Pin 29 on LTC6803-1/ Pin 30 on LTC6803-3): Connect
to the most negative potential in the series of cells.
(Pin 33 on LTC6803-1/ Pin 34 on LTC6803-3 ): 3.065V
inputs can also be general purpose ADC inputs.
, V
REF
TEMP2
pin can be used to monitor temperature. The
LTC6803-1/LTC6803-3
(Pins 31, 32 on LTC6803-1/ Pins 32, 33
–
. Larger loads should be buffered
REF
–
TEMPn
REF
form Kelvin connections to
pin can drive a 100k resis-
pin voltage. Therefore a
with respect to V
–
trace.
–
through 10Ω.
–
on the PCB.
–
can be
–
680313f
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and