nt1gc64bh4b0ps Nanya Techology, nt1gc64bh4b0ps Datasheet - Page 12

• Manufacturer Part Number: nt1gc64bh4b0ps
• Description: Unbuffered Ddr3 So-dimm
• Manufacturer: Nanya Techology

NT1GC64BH4B0PS / NT2GC64B88B0NS / NT4GC64B8HB0NS
1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64
PC3-8500 / PC3-10600
Unbuffered DDR3 SO-DIMM
REV 0.1
01/2010
Serial Presence Detect
117-118
119-121
126-127
64-116
34-59
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
60
61
62
63
0
1
2
3
4
5
6
7
8
9
CRC range, EEPROM bytes, bytes used
SPD revision
DRAM device type
Module type (form factor)
SDRAM Device density and banks
SDRAM device row and column count
Reserved
Module ranks and device DQ count
ECC tag and module memory Bus width
Fine timebase dividend/divisor (in ps)
Medium timebase dividend
Medium timebase divisor
Minimum SDRAM cycle time (tCKmin)
Reserved
CAS latencies supported
CAS latencies supported
Minimum CAS latency time (tAAmin)
Minimum write recovery time (tWRmin)
Minimum -to- delay (tRCDmin)
Minimum Row Active to Row Active delay (tRRDmin)
Minimum row Precharge delay (tRPmin)
Upper nibble for tRAS and tRC
Minimum Active-to-Precharge delay (tRASmin)
Minimum Active-to-Active/Refresh delay (tRCmin)
Minimum refresh recovery delay (tRFCmin) LSB
Minimum refresh recovery delay (tRFCmin) MSB
Minimum internal Write-to-Read command delay (tWTRmin)
Minimum internal Read-to-Precharge command delay (tRTPmin)
Minimum four active window delay (tFAWmin) LSB
Minimum four active window delay (tFAWmin) MSB
SDRAM device output drivers suported
SDRAM device thermal and refresh options
Module Thermal Sensor
SDRAM Device Type
Reserved
Module height (nominal)
Module thickness (Max)
Raw Card ID reference
DRAM address mapping edge connector
Reserved
Module manufacture ID
Module manufacturer Information
CRC
(Part 1 of 2) [4GB – 2 Ranks, 256Mx8 DDR3 SDRAMs]
Description
Extended Temperature Range,
Non Thermal Sensor Support Non Thermal Sensor Support
Front: 1 < thickness ≤ 2 mm,
Back: 1 < thickness ≤ 2 mm,
Standard Monolithic Device
CRC Covers Bytes: 0~116,
12
DLL-Off Mode Support,
29 ＜ height ≦ 30 mm
Total SPD Bytes: 256,
SPD Bytes Used: 176,
(Combo bytes 24,25)
15 rows, 10 columns
(Combo byte 28, 29)
Nanya Technology
Non ECC, 64bits
Calculated Value
DDR3 SDRAM
2 ranks, 8 bits
8 banks, 2Gb
Revision 1.0
Raw Card F
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
SO-DIMM
13.125ns
13.125ns
13.125ns
50.625ns
RZQ / 6,
RZQ / 7,
1.875ns
37.5ns
37.5ns
ODTS,
PASR,
110ns
2.5ps
7.5ns
7.5ns
7.5ns
1.5 V
ASR,
6,7,8
15ns
-BE
1ns
8ns
1,1
SPD Entry Value
NANYA reserves the right to change products and specifications without notice.
Back: 1 < thickness ≤ 2 mm,
Front: 1 < thickness ≤ 2 mm,
CRC Covers Bytes: 0~116,
Standard Monolithic Device
DLL-Off Mode Support,
Extended Temperature
SPD Bytes Used: 176,
29 ＜ height ≦ 30 mm
Total SPD Bytes: 256,
(Combo bytes 24,25)
15 rows, 10 columns
(Combo byte 28, 29)
Nanya Technology
Non ECC, 64bits
Calculated Value
DDR3 SDRAM
2 ranks, 8 bits
8 banks, 2Gb
Revision 1.0
Raw Card F
SO-DIMM
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
13.125ns
13.125ns
13.125ns
49.125ns
RZQ / 6,
RZQ / 7,
6,7,8,9
Range,
ODTS,
PASR,
110ns
1.5 V
2.5ps
1.5ns
7.5ns
7.5ns
ASR,
15ns
36ns
30ns
-CG
1ns
8ns
6ns
1,1
© NANYA TECHNOLOGY CORPORATION
Serial PD Data Entry (Hex.)
-BE
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-CG
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