s29gl128n Meet Spansion Inc., s29gl128n Datasheet - Page 66

• Manufacturer Part Number: s29gl128n
• Description: 3.0 Volt-only Page Mode Flash Memory Featuring 110 Nm Mirrorbit ?rocess Technology
• Manufacturer: Meet Spansion Inc.

64
Legend:
X = Don’t care.
RA = Address of the memory location to be read.
SA = Sector Address. Any address that falls within a specified sector.
See Tables
Notes:
1.
2.
3.
4.
5.
Protection (PPB)
Volatile Sector
Volatile Sector
Non-Volatile
(PPB Lock)
Protection
Protection
Protection
Password
Register
All values are in hexadecimal.
Shaded cells indicate read cycles.
Address and data bits not specified in table, legend, or notes are
don’t cares (each hex digit implies 4 bits of data).
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
Sector
Freeze
Global
(DYB)
Lock
Bits
Command Sequence
2–4
Command Set Entry (5)
Program (6)
Read (6)
Command Set Exit (7)
Command Set Entry (5)
Program (8)
Read (9)
Unlock (10)
Command Set Exit (7)
Command Set Entry (5)
PPB Program (11)
All PPB Erase (11, 12)
PPB Status Read
Command Set Exit (7)
Command Set Entry (5)
PPB Lock Bit Set
PPB Lock Bit Status Read
Command Set Exit (7)
Command Set Entry (5)
DYB Set
DYB Clear
DYB Status Read
Command Set Exit (7)
(Notes)
for sector address ranges.
Table 13. Sector Protection Commands (x16)
3
2
1
2
3
2
4
7
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
Addr
555
555
XXX
555
555
XXX
555
XX
00
XX
XX
00
XX
XX
XX
SA
XX
XX
XX
XX
XX
SA
XX
First
PWD0
RD(0)
RD(0)
RD(0)
Data
S29GL-N MirrorBit™ Flash Family
Data
AA
A0
90
AA
A0
25
90
AA
A0
80
90
AA
A0
90
AA
A0
A0
90
PWAx
Addr
2AA
XXX
2AA
2AA
2AA
2AA
XX
XX
SA
XX
XX
XX
SA
SA
XX
01
00
00
Second
PWD1
PWDx
Data
Data
D a t a
55
00
55
03
00
55
00
30
00
55
00
00
55
00
01
00
PWA = Password Address. Address bits A1 and A0 are used to select
each 16-bit portion of the 64-bit entity.
PWD = Password Data.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0. If
unprotected, DQ0 = 1.
6.
7.
8.
9.
10. Password may be unlocked or read in any order. Unlocking
11. ACC must be at V
12. “All PPB Erase” command pre-programs all PPBs before erasure
Addr
555
555
555
555
555
No unlock or command cycles required when bank is reading
array data.
Exit command must be issued to reset the device into read
mode; device may otherwise be placed in an unknown state.
Entire two bus-cycle sequence must be entered for each portion
of the password.
Full address range is required for reading password.
requires the full password (all seven cycles).
to prevent over-erasure.
02
00
Third
S h e e t
Bus Cycles (Notes 1–4)
PWD2
PWD0
Data
40
60
C0
50
E0
Addr
03
01
Fourth
IH
when setting PPB or DYB.
PWD3
PWD1
Data Addr
02
Fifth
PWD2
Data
S29GL-N_00_B3 October 13, 2006
Addr
03
Sixth
PWD3
Data
Addr Data
00
Seventh
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