s29gl128n Meet Spansion Inc., s29gl128n Datasheet - Page 68

• Manufacturer Part Number: s29gl128n
• Description: 3.0 Volt-only Page Mode Flash Memory Featuring 110 Nm Mirrorbit ?rocess Technology
• Manufacturer: Meet Spansion Inc.

66
Legend:
X = Don’t care.
RA = Address of the memory location to be read.
SA = Sector Address. Any address that falls within a specified sector.
See Tables
Notes:
1.
2.
3.
4.
5.
Protection (PPB)
Volatile Sector
Volatile Sector
Non-Volatile
(PPB Lock)
Protection
Protection
Protection
Password
Register
All values are in hexadecimal.
Shaded cells indicate read cycles.
Address and data bits not specified in table, legend, or notes are
don’t cares (each hex digit implies 4 bits of data).
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
Sector
Freeze
Global
(DYB)
Lock
Bits
Command Sequence
2–4
(Notes)
Command Set Entry (5)
Program (6)
Read (6)
Command Set Exit (7)
Command Set Entry (5)
Program (8)
Read (9)
Unlock (10)
Command Set Exit (7)
Command Set Entry (5)
PPB Program (11)
All PPB Erase (11, 12)
PPB Status Read
Command Set Exit
Command Set Entry (5)
PPB Lock Bit Set
PPB Lock Bit Status Read
Command Set Exit (7)
Command Set Entry (5)
DYB Set
DYB Clear
DYB Status Read
Command Set Exit (7)
for sector address ranges.
(7)
11
3
2
1
2
3
2
8
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
Table 15. Sector Protection Commands (x8)
Addr
AAA
XXX
XXX
AAA
XXX
AAA
XXX
XXX
XXX
AAA
XXX
XXX
XXX
AAA
XXX
XXX
XXX
00
00
07
00
05
XX
SA
SA
1st / 8th
PWD0
PWD7
PWD5
RD(0)
RD(0)
RD(0)
Data
Data
AA
AA
AA
AA
AA
A0
90
A0
25
90
A0
80
90
A0
90
A0
A0
90
S29GL-N MirrorBit™ Flash Family
PWAx
Addr
XXX
XXX
XXX
XXX
XXX
555
555
555
555
555
XX
SA
XX
SA
SA
01
00
06
00
2nd/9th
PWDx
PWD1
PWD6
Data
Data
55
00
55
03
00
55
00
30
00
55
00
00
55
00
01
00
D a t a
PWA = Password Address. Address bits A1 and A0 are used to select
each 16-bit portion of the 64-bit entity.
PWD = Password Data.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0. If
unprotected, DQ0 = 1.
6.
7.
8.
9.
10. Password may be unlocked or read in any order. Unlocking
11. ACC must be at V
12. “All PPB Erase” command pre-programs all PPBs before erasure
Addr
AAA
AAA
AAA
AAA
AAA
02
00
07
3rd/10th
No unlock or command cycles required when bank is reading
array data.
Exit command must be issued to reset the device into read
mode; device may otherwise be placed in an unknown state.
Entire two bus-cycle sequence must be entered for each portion
of the password.
Full address range is required for reading password.
requires the full password (all seven cycles).
to prevent over-erasure.
Bus Cycles (Notes 1–4)
S h e e t
PWD2
PWD0
PWD7
Data
C0
40
60
50
E0
Addr
03
01
00
4th/ 11th
IH
PWD3
PWD1
Data Addr
when setting PPB or DYB.
29
04
02
5th
PWD4
PWD2
Data
S29GL-N_00_B3 October 13, 2006
Addr
05
03
6th
PWD5
PWD3
Data
Addr Data
06
04
7th
PWD6
PWD4