tld4012 Tripath Technology Inc., tld4012 Datasheet - Page 4

• Manufacturer Part Number: tld4012
• Description: Adsl Line Driver Using Tripath Digital Power Processing Dpp ?
• Manufacturer: Tripath Technology Inc.

P
P
P
P
P
I
I
I
I
I
I
I
I
V
V
I
I
V
'V
V
I
'I
R
C
R
SYMBOL
DD5
SS5
DD15
SS15
q1
q2
q1LP
q2LP
OUTmax
SC
b
CONS1
CONS3
CONS4
CONS5
CONS6
BG
OUTmax
IO
OSHI
IDIFF
IDIFF
OUTLP
b
OS
E L E C T R I C A L C H A R A C T E R I S T I C S
Unless otherwise specified, T
Test/Application Circuits. See functional description for details regarding synthetic output impedance. Minimum and
maximum limits are guaranteed but may not be 100% tested.
4
Power Consumption
Power Consumption, no signal
Power Consumption, no signal, low power
mode
G.Lite
Disable mode
Operating Current VDD5
Operating Current VSS5
Operating Current VDD15
Operating Current VSS15
Quiescent Current (VDD5 and VSS5)
Quiescent Current (VDD15 and VSS15)
Quiescent Current (VDD5 and VSS5), low
power mode
Quiescent Current (VDD15 and VSS15),
low power mode
Band-gap Voltage
Differential Output Voltage, peak-to-peak
differential
Differential Output Current
Short-circuit Output Current
Differential Input Offset Voltage
Offset Voltage Drift
Differential Output Offset Voltage
Input Bias Current
Differential Input Bias Current
Differential Input Resistance
Differential Input Capacitance
Output Resistance (while in Low-power
mode)
PARAMETER
A
= 25qC, VDD5 = +5V, VSS5 = -5V, VDD15 = +15V, VSS15 = -15V. Also, see
R
Full-rate, overlapped ADSL signal, line
power = 110 mW (20.4 dBm), with
synthetic output impedance
R
LOPWR = Low (see Fig. 1)
R
LOPWR = High (see Fig. 1)
R
G.Lite signal, line power = 41.6 mW
(16.2 dBm). See Fig. 1.
RESETB = Low
R
Full-rate, overlapped ADSL signal with
synthetic output impedance
R
Full-rate, overlapped ADSL signal with
synthetic output impedance
R
Full-rate, overlapped ADSL signal with
synthetic output impedance
R
Full-rate, overlapped ADSL signal with
synthetic output impedance
R
R
LOPWR = Low
R
LOPWR = High
R
LOPWR = High
Gain = 17.8 to 27.8 dB, R
Gain = 12.8 to 16.8 dB, R
R
R
Gain = 27.8dB, EN_AC = High, 5k:
across INN and INP
EN_AC = Low
LOPWR = High
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
EXT
Low
= 24k:
= 71:, P
= 50:, No Input Signal,
= 50:, No Input Signal,
= 71:, P
= 71:, P
= 71:, P
= 71:, P
= 71:, P
= 71:, No input signal, LOPWR =
= 71:, No input signal,
= 71:, No input signal,
= 71:, No input signal,
= 71:
CONDITIONS
OUT
OUT
OUT
OUT
OUT
OUT
= 154 mW,
= 58 mW,
= 154 mW,
= 154 mW,
= 154 mW,
= 154 mW,
LOAD
LOAD
(see Fig. 1)
(see Fig. 1)
(see Fig. 1)
(see Fig. 1)
(see Fig. 1)
= 71:
= 71:
T r i p a t h T e c h n o l o g y , I n c . - T e c h n i c a l I n f o r m a t i o n
MIN.
TLD4012 – JB/Rev. 2.0a/05.02
-100
500
42
20
TYP.
47.0
49.0
21.7
11.0
0.68
1.28
740
250
130
390
800
600
800
8.0
9.5
1.1
0.5
0.2
0.5
10
30
2
MAX.
100
UNITS
PV/qC
mW
mW
mW
mW
mW
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mV
PV
PA
PA
k:
pF
:
V
V