tld4012 Tripath Technology Inc., tld4012 Datasheet - Page 9

• Manufacturer Part Number: tld4012
• Description: Adsl Line Driver Using Tripath Digital Power Processing Dpp ?
• Manufacturer: Tripath Technology Inc.

O v e r - t e m p e r a t u r e P r o t e c t i o n
An over-temperature fault occurs if the junction temperature of the device exceeds approximately 160qC.
When a fault occurs the TLD4012 output driver enters the disabled mode, and asserts a logic HIGH on the
FAULT pin. An over-temperature fault can only be cleared after the junction temperature drops below
approximately 120qC.
O v e r - c u r r e n t P r o t e c t i o n
An over-current fault occurs when current delivered from either of the output pins, OUTP or OUTN,
exceeds the current limit value. When a fault occurs, the TLD4012’s output driver enters disabled mode,
and asserts a logic HIGH on the FAULT pin. The level at which the current limit occurs is set by R
The relationship between the over-current limit and R
R
The acceptable range of R
R
If the device is operated with AUTO_CLR set to a logic high level, and an over-current condition occurs,
the device will cycle between the fault state and normal state as described in the “Protection Circuits”
section above.
If the cycling mode described above is not desirable, the over-current limit can be set to 1.0 A, (i.e. R
19.2 k:). With this current limit value, the device will not enter the cycling mode if a short occurs on the
twisted pair because the matching resistors, R
temperature protection will eventually act to protect the device, and in the event of a short on the board,
the over-current protection will still take affect to protect the device.
L o w - P o w e r M o d e
The TLD4012 can be placed into a low-power consumption mode by asserting a logic HIGH on the
LOPWR input. In this mode the device consumes approximately 130 mW, but still provides a low output
resistance to allow reception of incoming signals.
D i s a b l e M o d e
The TLD4012 can be placed in a lower power disabled mode by holding RESETB to a logic low level. In
this mode the power dissipation is only 10 mW, and the line is not terminated so reception of incoming
signals is not reliable. In this mode the outputs are high impedance as long as they are not driven
externally more than about +/-2.0V
impedance.
Upon power-up the TLD4012 does not exit disabled mode until the VDD5/VSS5 power supply pins are
greater than about 4.2V. It will automatically enter disabled mode when the VDD5/VSS5 supply pins are
less than about 4.0V.
I n p u t C o m m o n - m o d e F e e d b a c k L o o p a n d I n p u t - B i a s - C u r r e n t C a n c e l l a t i o n
The TLD4012 has a common-mode feedback loop on the input stage and an input-bias-current
cancellation circuit. Setting the EN_AC input to a logic high level enables both features. When enabled
the common-mode feedback loop will set the common-mode input voltage. This allows use of a
differential filter (i.e. not referenced to ground) between the AFE and the driver. When the common-mode
feedback loop is disabled (EN_AC = Low) the application should replace the single input resistor, R
shown in Figure 1 with two input resistors connected from the inputs, INN and INP, to ground.
9
EXT
EXT
= 19.2 / I
in most ADSL applications is 24k: which results in an 800mA current limit.
CL
, where I
CL
EXT
is the short circuit current limit in A, and R
is 19.2 k: to 32 k:, or 1.0 A to 600 mA, respectively. A typical value for
ppdiff
around ground. Beyond this voltage the outputs become low
S
, will limit the current to less than 1.0A. The over-
EXT
is:
EXT
T r i p a t h T e c h n o l o g y , I n c . - T e c h n i c a l I n f o r m a t i o n
is in k:.
TLD4012 – JB/Rev. 2.0a/05.02
EXT
IN
EXT
,
.
=