ics9248-114 Integrated Device Technology, ics9248-114 Datasheet

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ics9248-114

Manufacturer Part Number
ics9248-114
Description
Amd-k7 System Clock Chip
Manufacturer
Integrated Device Technology
Datasheet
AMD - K7™ System Clock Chip
Third party brands and names are the property of their respective owners.
Recommended Application:
Output Features:
Features:
Skew Specifications:
Block Diagram
CPU_STOP#
9248-114 Rev D 12/28/01
SEL24_48#
BUFFER IN
FS (3:0)
1 - Differential pair open drain CPU clocks
1 - Single-ended open drain CPU clock
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Up to 155MHz frequency support
Support power management: CPU stop and Power down
Mode from I
Spread spectrum for EMI control (0 to -0.5% down
spread, ± 0.25% center spread).
Uses external 14.318MHz crystal
CPUT – CPUC: <200ps
PCI – PCI: <500ps
CPU – PCI: <1-3ns
SDATA
SCLK
PD#
X2
X1
XTAL
OSC
Spectrum
PLL2
2
Spread
Control
Config.
PLL1
Logic
Integrated
Circuit
Systems, Inc.
C programming.
Reg.
DIVDER
DIVDER
DRIVER
SDRAM
CPU
PCI
/ 2
Stop
48MHz
24_48MHz
CPUCLKC0
CPUCLKT (1:0)
PCICLK (4:0)
PCICLK_F
SDRAM (11:0)
SDRAM_OUT
REF (1:0)
*SEL24_48#/PCICLK1
REF0/CPU_STOP#*
*MODE/PCICLK_F
Functionality
F
*FS3/PCICLK0
0
0
0
0
0
0
0
0
S
1
1
1
1
1
1
1
1
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
3
BUFFER IN
SDRAM11
SDRAM10
PCICLK2
PCICLK3
PCICLK4
SDRAM9
SDRAM8
SDATA
VDD1
VDD2
VDD2
VDD3
SCLK
F
GND
GND
GND
GND
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X1
X2
2
48-Pin 300mil SSOP
Pin Configuration
F
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
1
2
3
4
5
6
7
8
9
F
S
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
ICS9248-114
(
0 1
1 1
3 1
0 1
2 1
1 1
1 1
0 1
4 1
5 1
2 1
3 1
2 1
6
8
7
C
M
. 6
. 5
. 3
. 4
. 3
. 2
. 3
. 0
. 0
. 5
. 0
. 5
. 0
. 0
. 4
. 3
P
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
H
0 0
0 3
0 8
U
0 0
0 0
0 0
0 3
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 3
) z
REF1/FS2*
GND
CPUCLKT1
GND
CPUCLKC0
CPUCLKT0
VDDL
PD#*
SDRAM_OUT
GND
SDRAM0
SDRAM1
VDD3
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDD3
SDRAM6
SDRAM7
VDD4
48MHz/FS0*
24/48MHz/FS1*
P
(
C
4
3
4
3
4
4
3
3
3
3
3
M
3
3
3
3
3
. 0
C I
. 1
. 7
. 1
. 3
. 4
. 7
. 4
. 3
. 8
. 6
. 5
. 5
. 7
. 1
. 3
H
0 5
0 4
0 0
0 0
0 0
0 5
0 0
3 3
5 6
3 3
3 3
3 4
3 3
3 3
7 6
3 3
L
) z
K

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ics9248-114 Summary of contents

Page 1

... ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS9248-114 Pin Configuration 48 VDD1 ...

Page 2

... ICS9248-114 Pin Descriptions ...

Page 3

... Mode Pin - Power Management Input Control Third party brands and names are the property of their respective owners ICS9248-114 ...

Page 4

... ICS9248-114 Serial Configuration Command Bitmap ...

Page 5

... ICS9248-114 ...

Page 6

... ICS9248-114 Absolute Maximum Ratings Electrical Characteristics - Input/Supply/Common Output Parameters 70C; Supply Voltage V = 3.3 V +/-5% (unless otherwise stated PARAMETER SYMBOL Input High Voltage V IH Input Low Voltage V IL Input High Current I IH Input Low Current I IL1 Input Low Current I IL2 I DD3.3OP66 ...

Page 7

... CONDITIONS ICS9248-114 MIN TYP MAX 60 1 1.2 0.4 18 1.93 2.6 0.81 2.6 45 49.3 55 0.4 1. 0.6 pull-up (external) 0 0.6 pull-up (external) 550 958 1100 94 200 158 250 is the "true" ...

Page 8

... ICS9248-114 Electrical Characteristics - PCICLK 70C 3.3V +/-5 PARAMETER SYMBOL Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 I Output Low Current OL1 1 Rise Time Fall Time Duty Cycle t1 1 Skew window t sk1 1 Jitter, ...

Page 9

... Third party brands and names are the property of their respective owners (unless otherwise stated) CONDITIONS ICS9248-114 MIN TYP MAX UNITS 2.4 3.03 V 0.23 0.4 V -50 - 1.47 4.0 ns 1. 552 1000 ps -1 421 500 ps ...

Page 10

... ICS9248-114 General I How to Write: How to Write: Controller (Host) ICS (Slave/Receiver) Start Bit Address D2 (H) Dummy Command Code Dummy Byte Count Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Stop Bit Notes: Third party brands and names are the property of their respective owners serial interface information ...

Page 11

... Shared Pin Operation - Input/Output Pins Programming Header Via to Gnd Device Pad Third party brands and names are the property of their respective owners. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig. 1 ICS9248-114 ...

Page 12

... ICS9248-114 CPU_STOP# Timing Diagram INTERNAL CPUCLK PCICLK CPU_STOP# PD# (High) CPUCLKT (1:0) CPUCLKC0 Third party brands and names are the property of their respective owners. ...

Page 13

... PD# Timing Diagram PD# CPUCLKT CPUCLKC PCICLK VCO Crystal Third party brands and names are the property of their respective owners. ICS9248-114 ...

Page 14

... ICS9248-114 Ordering Information ICS9248yF-114-T ICS XXXX PPP - T Third party brands and names are the property of their respective owners. SYMBOL In Millimeters COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX A 2.413 2.794 A1 0.203 0.406 b 0.203 0.343 c 0.127 0.254 D SEE VARIATIONS E 10.033 10.668 E1 7.391 7.595 e 0 ...

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