ics9248-20 Integrated Device Technology, ics9248-20 Datasheet
ics9248-20
Related parts for ics9248-20
ics9248-20 Summary of contents
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... Pentium/Pro System Clock Chip TM General Description The ICS9248- Clock Synthesizer chip for Pentium and PentiumPro CPU based Desktop/Notebook systems that will provide all necessary clock timing. Features include four CPU and eight PCI clocks. Three reference outputs are available equal to the crystal frequency ...
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... ICS9248-20 Pin Descriptions ...
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... Clocks including SDRAM clocks will continue to run while this function is enabled. The CPUCLK’s will have a turn ON latency of at least 3 CPU clocks. PCI_STOP# This is a synchronous active Low Input pin used to stop the PCICLK clocks in an active low state. It will not affect PCICLK_F nor any other outputs. 3 ICS9248-20 ...
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... The first clock pulse coming out of a stopped clock condition may be slightly distorted due to clock network charging circuitry. Board routing and signal loading may have a large impact on the initial clock distortion also. ICS9248-20 Power Management Requirements ...
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... PD# and PCI_STOP# are shown in a high (true) state. PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-20 used to turn off the PCICLK (0:6) clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-20 internally. The minimum that the PCICLK (0:6) clocks are enabled (PCI_STOP# high pulse least 10 PCICLK (0:6) clocks ...
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... The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active low input. This signal is synchronized internally by the ICS9248-20 prior to its control action of powering down the clock synthesizer. Internal clocks will not be running after the device is put in power down state ...
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... From 1st crossing to 1% target Freq. From target Freq 1 2.5 V +/-5% (unless otherwise stated) DDL CONDITIONS pF; Select @ 66.8 MHz pF; Select @ 100 MHz 1 1. ICS9248-20 +0 MIN TYP MAX -0.3 0 2.0 -200 -100 60 170 ...
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... ICS9248-20 Electrical Characteristics - CPUCLK 70C 3.3 V +/-5 DDL PARAMETER SYMBOL Output High Voltage V OH2B Output Low Voltage V OL2B Output High Current I OH2B Output Low Current I OL2B 1 Rise Time t r2B 1 Fall Time t f2B 1 Duty Cycle d t2B 1 Skew t sk2B 1 Jitter, Cycle-to-cycle ...
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... L CONDITIONS ICS9248-20 MIN TYP MAX UNITS 2.4 3.1 V 0.1 0.4 V - 140 250 ps 17 150 ps -500 70 500 ...
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... ICS9248-20 Electrical Characteristics - 48 MHz 70C 3.3 V +/-5 DDL PARAMETER SYMBOL 1 Frequency Accuracy F ACC48m Output High Voltage V OH5 Output Low Voltage V OL5 Output High Current I OH5 Output Low Current I OL5 1 Rise Time Fall Time Duty Cycle Jitter, One Sigma ...
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... Lead Free , RoHS Compliant (Optional) Designation for tape and reel packaging Package Type F = SSOP Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device 11 ICS9248-20 300 mil SSOP In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN 2 ...
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... ICS9248-20 Revision History Rev. Issue Date Description D 06/04/07 Updated Package and Ordering Information. 0276D—06/04/07 12 Page # 11 ...