ics9lprs535 Integrated Device Technology, ics9lprs535 Datasheet - Page 14

• Manufacturer Part Number: ics9lprs535
• Description: Integrated Circuit Systems, Inc.
• Manufacturer: Integrated Device Technology

1461A—07/28/09
Comments
Power-up w/ TEST_SEL = 1 to enter test mode
Cycle power to disable test mode
FSLC./TEST_SEL -->3-level latched input
If power-up w/ V>2.0V then use TEST_SEL
If power-up w/ V<2.0V then use FSLC
FSLB/TEST_MODE -->low Vth input
TEST_MODE is a real time input
If TEST_SEL HW pin is 0 during power-up,
test mode can be invoked through B9b3.
If test mode is invoked by B9b3, only B9b4
is used to select HI-Z or REF/N
FSLB/TEST_Mode pin is not used.
Cycle power to disable test mode, one shot control
B9b3: 1= ENTER TEST MODE, Default = 0 (NORMAL OPERATION)
B9b4: 1= REF/N, Default = 0 (HI-Z)
Test Clarification Table
Integrated
Circuit
Systems, Inc.
TEST_SEL
14
HW PIN
<2.0V
>2.0V
>2.0V
>2.0V
>2.0V
<2.0V
<2.0V
FSLC/
HW
TEST_MOD
HW PIN
FSLB/
X
X
X
E
0
0
1
1
ENTRY BIT
TEST
B9b3
X
X
X
X
0
1
1
SW
ICS9LPRS535
REF/N or
B9b4
HI-Z
0
0
1
0
1
0
1
Datasheet
NORMAL
OUTPUT
REF/N
REF/N
REF/N
REF/N
HI-Z
HI-Z