ics1523 Integrated Device Technology, ics1523 Datasheet - Page 19
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ics1523
Manufacturer Part Number
ics1523
Description
Video Clock Synthesizer With I?c Programmable Delay
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1523.pdf
(21 pages)
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MDS ICS1523 Z
Note 1- V
Note 2- Measured at 135MHz, 3.6 VDC, 0
Note 3- Measured at 135MHz, 3.6 VDC, 0
Analog Input (HSYNC)
Input High Voltage
Input Low Voltage
Digital Inputs (SDA, SCL, EXTFB, OSC, I
Input High Voltage
Input Low Voltage
Input Hysteresis
POR Threshold
SDA Digital Output
SDA Output Low Voltage
SDA Output High Voltage
PECL Outputs (CLK+, CLK-, CLK/2+, CLK/2-)
Output High Voltage
Maximum Output Frequency
Output Low Voltage *
Duty Cycle
Transition Time - Rise
Transition Time - Fall
SSTL_3 Outputs (CLK, CLK/2, FUNC, LOCK/REF)
Output Resistance
Maximum Output Frequency
Duty Cycle
Clock and FUNC
Transition Time - Rise
Clock and FUNC
Transition Time - Fall
LOCK/REF Transition Time -
Rise
LOCK/REF Transition Time - Fall
OL
must not fall below the level given so that the correct value for IOUT can be maintained.
Parameter
Integrated Device Technology, Inc.
o
o
C, 20 pF, with 75 Ω Termination.
C, 20 pF, Unterminated.
Symbol
F
F
P
s
V
V
P
S
T
V
V
T
T
T
T
T
V
V
V
V
R
MAX
MAX
OH
OH
CR
OL
OL
DC
PR
PF
DC
CF
LR
-
LF
-
IH
IH
IL
IL
O
19
Tech Support: www.idt.com/go/clockhelp
Video Clock Synthesizer with I
VSS - 0.3
VSS - 0.3
Min.
2
VSS
1.7
0.2
1.0
45
45
CADDR)
2
-
-
-
-
-
-
-
-
-
-
Max.
VDD
250
150
5.5
1.1
5.5
0.8
0.6
1.8
0.4
6.0
1.0
1.2
1.6
1.0
3.0
2.0
55
80
55
-
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
%
%
V
V
V
V
V
V
V
V
V
V
Ω
2
C Programmable Delay
Programmed Value
Voltage that resets
Determined by
register values
1 V < V
VDDD = 3.3 V
VDDD = 3.3 V
external Rset
IOUT = 3ma
Revision 052407
IOUT=0
resistor
IOUT =
Notes
1
2
2
2
3
3
3
3
3
O
ICS1523
< 2 V