ad2s46 Analog Devices, Inc., ad2s46 Datasheet - Page 4

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ad2s46

Manufacturer Part Number
ad2s46
Description
Low Cost, L6-bitsynchro Resolver -to-digital Converte
Manufacturer
Analog Devices, Inc.
Datasheet

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The AD2S46"series operate on a Type 2 tracking closed-loop
convert commands and wait states. As the transducer moves
ence signal, and K is the transformation ratio of the input signal
conditioner. If the unit is a resolver-to digital converter, the 4-
PRINCIPLES OF OPERATION
principle. The output digital word continually tracks the posi-
tion of the resolver/synchro shaft without the need for external
through a position equivalent to the least significant bit weight-
ing, the oUtput digital word is updated by one LSB.
If the device is a synchro-to-digital converter, the 3-wire synchro
output will be connected to Sl, 52 and 53 on the unit and a
Where e is the angle of the synchro shaft, Eo sin <utis the refer-
wire resolver output will be connected direcdy to SI, S2, 53 and
54 on the unit.
solid-state 5cott-T inpUt conditioner will convert these signals
inro resolver format, i.e.,
AD2S46
RNRLOGDEVICES fRX-ON-DEHRND HOTLINE
VI = K Eo sin UItsin e
V 2
=
K Eo sin wt cas H
(LSa) BIT 16
ENABLE
PIN CONFIGURATION
SELECT
ENABLE
L.!
f9
BYTE
RlO
I (Not to Scale)
Roo
52
54
S3
SI
TOPVIEW
AD2S46
CONDmONER
CONDITIONER
REFERENCE
RESOLVERI
SYNCHRO
-
1..:2
I V2
AD2S46 Functional Block Diagram
Page
2
OBI TO DB16
15
REF
(cos)
(sin)
-4-
down counter, (j), equals, to within the rated accuracy of the
converter, the synchro/resolver shaft angle, e.
These signals are subtracted
or
A phase sensitive detector, integrator and voltage controlled os.
cillator (VCO) form a closed-loop system which seeks to null sin
(8-(!». When this is accomplished, the word state of the up-
To understand
word state of the up-down counter is <j).V I is multiplied
cos
9
20
21-28 DB1-DB8
16
17
18
19
PIN
1--8
10
11-14
15
K Eo sin wt cos e sin <I>
K Eo sin wt (sin e cos <!>
K Eo sin wt sin (6-<1»
K Eo sin UIt sin e .:os <I>
<I>
and V2 is multiplied by sin <I> to give:
RLo
GND
INHIBIT
MNEMONIC
DB9-DB16
ENABLE
BYTE SELECT
S4-S1
RHI
-Va
+Vs
AD2S46 PIN FUNCTION DESCRIPTION
the conversion
AD2S46
SYNCHRO/RESOLVER SIGNAL INPUTS
NEGATIVE POWER SUPPLY
POSITIVE POWER SUPPLY
INPUT PIN TO INHIBIT CONVERTER
DESCRIPTION
PARALLEL OUTPUT DATA BITS
PARALLEL OUTPUT DATA BITS
OUTPUT ENABLE INPUT
BYTE SELECT INPUT SIGNAL
INPUT PIN FOR REFERENCE HIGH
INPUT PIN FOR REFERENCE LOW
POWER SUPPLY GROUND
-
by the error amplifier to give:
cos fI sin <1»
process, assume that the current
INHIBIT
+vs
-vs
GND
by
REV. 0

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