pcf8534 NXP Semiconductors, pcf8534 Datasheet - Page 20

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pcf8534

Manufacturer Part Number
pcf8534
Description
Universal Driver Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCF8534_0
Preliminary datasheet
7.5 Acknowledge
7.6 PCF8534 I
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
bit. The acknowledge bit is a HIGH level signal put on the bus by the transmitter during
which time the master generates an extra acknowledge related clock pulse. A slave
receiver which is addressed must generate an acknowledge after the reception of each
byte. Also a master receiver must generate an acknowledge after the reception of each
byte that has been clocked out of the slave transmitter. The device that acknowledges
must pull-down the SDA line during the acknowledge clock pulse, so that the SDA line is
stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and
hold times must be taken into consideration). A master receiver must signal an end of data
to the transmitter by not generating an acknowledge on the last byte that has been
clocked out of the slave. In this event the transmitter must leave the data line HIGH to
enable the master to generate a STOP condition. Acknowledgement on the I
illustrated in
The PCF8534 acts as an I
transmit data to an I
the acknowledge signals of the selected devices. Device selection depends on the
I
subaddress.
2
Fig 13. System configuration
Fig 14. Acknowledgement of the I
C-bus slave address, on the transferred command data and on the hardware
SCL
SDA
by transmitter
data output
by receiver
data output
TRANSMITTER/
SCL from
RECEIVER
master
MASTER
Figure
2
C-bus controller
14.
2
condition
Rev. 00.05 — 20 February 2007
START
C-bus master receiver. The only data output from the PCF8534 are
S
2
RECEIVER
C-bus slave receiver. It does not initiate I
SLAVE
2
C-bus
1
TRANSMITTER/
RECEIVER
Universal LCD driver for low multiplex rates
SLAVE
2
TRANSMITTER
MASTER
not acknowledge
acknowledge
8
2
acknowledgement
C-bus transfers or
clock pulse for
PCF8534
TRANSMITTER/
© NXP B.V. 2007. All rights reserved.
RECEIVER
MASTER
9
2
mbc602
C-bus is
mga807
20 of 40

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