pcf8832 NXP Semiconductors, pcf8832 Datasheet - Page 16

• Manufacturer Part Number: pcf8832
• Description: Pcf8832 Stn Rgb - 384 Output Column Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7.17
Data is written byte-wise into the RAM matrix of the
PCF8832 as illustrated in Fig.11. The display RAM has a
matrix of 168
by the address pointers. The address ranges are
X = 0 to X = 127 (7F) and Y = 0 to Y = 167 (A7H).
Addresses outside of these ranges are not allowed.
Before writing to the RAM, a window must be defined into
which it can be written. The window is programmable via
the command registers with xs and ys designating the
start address, and xe and ye designating the end address.
If, for example, the whole display content is to be written,
the window is defined by the following values: xs = 0 (0H),
ys = 0 (0H), xe = 127 (7FH) and ys = 159 (9FH).
2002 Aug 16
handbook, full pagewidth
STN RGB - 384 output column driver
DDRAM addressing
D7
D6
D5
R G B
R2 R1 R0 G2 G1 G0 B1 B0
R2 R1 R0 G2 G1 G0 Bi2 Bi1 Bi0
D7 D6 D5 D4 D3 D2 D1 D0
D4
D3
D2
128
Diii
Dii
Di
9 bits. RAM locations are addressed
ye
ys
0
xs
Fig.11 RAM format and addressing.
display byte sent via interface
pixel information stored in display RAM
xe
16
X address
In vertical addressing mode (V = 1), the Y-address
increments after each byte. After the last Y-address
(Y = ye), Y wraps around to ys and X increments to
address the next column. In horizontal addressing mode
(V = 0), the X-address increments after each byte. After
the last X-address (X = xe), X wraps around to xs and
Y increments to address the next row. After the very last
address (X = xe and Y = ye) the address pointers wrap
around to address (X = xs and Y = ys). For flexibility in
handling a wide variety of display architectures, the
commands ‘RAM data addressing’ and ‘data control’
define flags MX, MY and L, which allows mirroring of the
X and Y-addresses and selection of landscape or portrait
mode. All combinations of flags are allowed. The available
combinations of writing to the display RAM are shown in
Figs 12 to 17. When MX, MY, V or L are changed, the
data must be rewritten to the display RAM.
Preliminary specification
127
167
0
1
2
3
4
5
6
7
PCF8832
Y address
MGW668