pcf8832 NXP Semiconductors, pcf8832 Datasheet - Page 23

• Manufacturer Part Number: pcf8832
• Description: Pcf8832 Stn Rgb - 384 Output Column Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8
The PCF8832 communicates with the host via two 8-bit
parallel interfaces, a 3-line or a 4-line serial peripheral
interface or an I
instructions does not require the display clock.
The PCF8832 has two access types, those defining the
operating mode of the device (instructions) and those
filling the display RAM. The latter are the most frequently
used. Efficient data transfer is achieved by
auto-incrementing RAM address pointers.
Table 6 Command register
Only command register addresses shown are allowed; after reset the registers go to their default value; is equivalent
to don't care; see Table 7 for explanation of control bits used
2002 Aug 16
(HEX)
ADR
STN RGB - 384 output column driver
0A
0B
0C
0D
0E
00
01
02
03
04
05
06
07
08
09
0F
10
11
12
13
14
15
16
INSTRUCTIONS
AA1S7 AA1S6 AA1S5 AA1S4 AA1S3 AA1S2 AA1S1 AA1S0
AA1E7 AA1E6 AA1E5 AA1E4 AA1E3 AA1E2 AA1E1 AA1E0
AA2S7 AA2S6 AA2S5 AA2S4 AA2S3 AA2S2 AA2S1 AA2S0
AA2E7 AA2E6 AA2E5 AA2E4 AA2E3 AA2E2 AA2E1 AA2E0
DSA17 DSA16 DSA15 DSA14 DSA13 DSA12 DSA11 DSA10
DSA27 DSA26 DSA25 DSA24 DSA23 DSA22 DSA21 DSA20
SEP7
xs[7]
xe[7]
ys[7]
ye[7]
NLI7
D7
0
0
0
0
0
0
0
0
0
0
2
C-bus interface. Processing of the
SEP6
xs[6]
xe[6]
ys[6]
ye[6]
NLI6
D6
0
0
0
0
0
0
0
0
0
SEP5
b002
b102
xs[5]
xe[5]
ys[5]
ye[5]
NLI5
D5
0
0
0
0
0
0
SEP4
FFQ4
b001
b101
xs[4]
xe[4]
ys[4]
ye[4]
NLI4
D4
0
0
0
0
0
0
0
SEP3
FFQ3
b000
b100
xs[3]
xe[3]
ys[3]
ye[3]
NLI3
SPS
D3
0
0
0
0
VMOE
SEP2
FFQ2
xs[2]
xe[2]
ys[2]
ye[2]
b012
b112
NLI2
MY
PM
D2
0
0
0
23
There are three types of instructions:
The initial sequence to be sent to the IC is given in Table 5.
Table 5 Initial instruction sequence
CONTROL BYTE (HEX)
Defining display configuration
Miscellaneous instructions
Setting X and Y-addresses.
VCOE
RSTA
SEP1
FFQ1
xe[1]
ye[1]
b011
b111
xs[1]
ys[1]
NLI1
DIM
MX
ER
D1
0
L
0
SEP0
FFQ0
DON
xe[0]
ye[0]
OFQ
b010
b110
xs[0]
ys[0]
NLI0
CF0
A2
85
PD
EC
D0
V
0
0
DEFAULT
(HEX)
00
01
00
7F
A7
4F
9F
00
00
00
02
00
07
00
01
27
00
00
50
00
00
00
05
REGISTER VALUE (HEX)
NOP (no operation)
Power-down
RAM data addressing
data control
display settings
oscillator-related bits
X-ADR start; 0
X-ADR end; xs
Y-ADR start; 0
Y-ADR end; ys
IO configuration;
oscillator frequency
n-line inversion
mapping blue scale b00;
b01
mapping blue scale b10;
b11
colour filter (RGB array)
active area 1 start ADR
active area 1 end ADR
active area 2 start ADR
active area 2 end ADR
scroll area start ADR;
DSA1
scroll area end ADR
scroll entry point
set frame frequency
Preliminary specification
DESCRIPTION
PCF8832
DSA2
06
00
ys
xs
ye
xe
A8
FF
A8
FF