adc081c027cimkx National Semiconductor Corporation, adc081c027cimkx Datasheet - Page 15

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adc081c027cimkx

Manufacturer Part Number
adc081c027cimkx
Description
I2c-compatible, 12-bit Analog-to-digital Converter Adc With Alert Function
Manufacturer
National Semiconductor Corporation
Datasheet

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1.4 REFERENCE VOLTAGE
The ADC081C021 uses the supply (V
V
version will only be as precise as the reference (V
supply voltage should be free of noise. The reference should
be driven by a low output impedance voltage source.
The Applications section provides recommended ways to pro-
vide the supply voltage appropriately. Refer to Section 2.1
TYPICAL APPLICATION CIRCUIT for details.
1.5 POWER-ON RESET
An internal power-on reset (POR) occurs when the supply
voltage transitions above the power-on reset threshold. Each
of the registers contains a defined value upon POR and this
data remains there until any of the following occurs:
The internal registers will lose their contents if the supply volt-
age goes below 2.4V. Should this happen, it is important that
the V
supply is raised again to properly reset the device and ensure
that the ADC performs as specified.
1.6 INTERNAL REGISTERS
The ADC081C021 has 8 internal data registers and one ad-
dress pointer. The registers provide additional ADC functions
such as storing minimum and maximum conversion results,
setting alert threshold levels, and storing data to configure the
operation of the device. Figure 6 shows all of the registers and
their corresponding address pointer values. All of the regis-
ters are read/write capable except the conversion result reg-
ister which is read-only.
A
must be treated as a reference. The analog-to-digital con-
The first conversion is completed, causing the Conversion
Result and Status registers to be updated.
A different data word is written to a writeable register.
The ADC is powered down.
A
supply be lowered to a maximum of 200mV before the
A
) as the reference, so
A
), so the
15
1.6.1 Address Pointer Register
The address pointer determines which of the data registers is
accessed by the I
write operation is stored in the address pointer register. This
value selects the register that the following data bytes will be
written to or read from. Only the three LSBs of this register
are variable. The other bits must always be written to as zeros.
After a power-on reset, the pointer register defaults to all ze-
ros (conversion result register).
Default Value: 00h
P2
P7
0
0
0
0
1
1
1
1
0
P1
P6
0
0
1
1
0
0
1
1
0
FIGURE 6. Register Structure
P5
P0
0
0
1
0
1
0
1
0
1
2
C interface. The first data byte of every
P4
0
Highest Conversion (read/write)
Lowest Conversion (read/write)
Conversion Result (read only)
Configuration (read/write)
Alert Status (read/write)
Hysteresis (read/write)
High Limit (read/write)
Low Limit (read/write)
P3
0
REGISTER
P2
Register Select
P1
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P0

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