pca9698 NXP Semiconductors, pca9698 Datasheet
pca9698
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pca9698 Summary of contents
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... A to allow direct driving of 40 LEDs. Any of the 40 I/O ports can be configured as an input or output. The PCA9698 is the first GPIO device in a new Fast-mode Plus (Fm+) family. Fm+ devices offer higher frequency ( MHz) and longer, more densely populated bus operation (up to 4000 pF). The device is fully confi ...
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... Instrumentation and test measurement PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT 2 C-bus. Defaults power-up. and power-up 3-state) OFF Rev. 02 — 19 July 2006 PCA9698 2 C-bus state machine) © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... PCA9698BS 5. Block diagram AD0 AD1 AD2 SCL SDA RESET Fig 1. Block diagram of PCA9698 PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT Package Name Description TSSOP56 plastic thin shrink small outline package; 56 leads; body width 6.1 mm HVQFN56 plastic thermal enhanced very thin quad fl ...
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... input port register polarity inversion register Rev. 02 — 19 July 2006 PCA9698 configuration port register data (Cx[y]) output port register data (Ox[y IOx_y Mx[y] INTERRUPT INT MANAGEMENT input port register data (Ix[y]) polarity inversion register data (Px[y]) 002aab936 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... IO1_1 14 PCA9698DGG 15 IO1_2 IO1_3 16 IO1_4 IO1_5 IO1_6 20 IO1_7 21 22 IO2_0 IO2_1 24 IO2_2 25 26 IO2_3 AD0 27 AD1 28 Rev. 02 — 19 July 2006 PCA9698 56 RESET 55 INT/SMBALERT 54 IO4_7 53 IO4_6 52 IO4_5 IO4_4 49 IO4_3 48 IO4_2 47 IO4_1 IO4_0 44 IO3_7 43 IO3_6 42 IO3_5 41 ...
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... Rev. 02 — 19 July 2006 PCA9698 42 IO4_3 41 IO4_2 40 IO4_1 IO4_0 37 IO3_7 36 IO3_6 35 IO3_5 34 IO3_4 ...
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... AD2, AD1 and AD0. Address values depending on AD2, AD1 and AD0 can be found in Table 12 “PCA9698 address Fig 5. PCA9698 device address The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected while a logic 0 selects a write operation. ...
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... Fig 6. Alert Response address 7.3 Command register Following the successful acknowledgement of the slave address + R/W bit, the bus master will send a byte to the PCA9698, which will be stored in the Command register. Fig 9. Command register The lowest 6 bits are used as a pointer to determine which register will be accessed. ...
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... Rev. 02 — 19 July 2006 PCA9698 Type Function read only Input Port register bank 0 read only Input Port register bank 1 read only Input Port register bank 2 read only Input Port register bank 3 read only Input Port register bank 4 ...
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... Mask interrupt register bank 3 read/write Mask interrupt register bank 4 - reserved for future use - reserved for future use - reserved for future use read/write output structure configuration read/write control all banks read/write PCA9698 mode selection © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... R/W 0000 0000* O3[7:0] R/W 0000 0000* O4[7:0] R/W 0000 0000* Rev. 02 — 19 July 2006 PCA9698 Description Input Port register bank 0 Input Port register bank 1 Input Port register bank 2 Input Port register bank 3 Input Port register bank 4 Description Output Port register bank 0 Output Port register bank 1 ...
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... R/W 1111 1111* C3[7:0] R/W 1111 1111* C4[7:0] R/W 1111 1111* Rev. 02 — 19 July 2006 PCA9698 Description Polarity Inversion register bank 0 Polarity Inversion register bank 1 Polarity Inversion register bank 2 Polarity Inversion register bank 3 Polarity Inversion register bank 4 Description I/O Configuration register bank 0 I/O Configuration register bank 1 I/O Confi ...
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... OUTCONF - output structure configuration register (address 28h) description OUT4 OUT3 OUT2 Rev. 02 — 19 July 2006 PCA9698 Value Description 1111 1111* Mask Interrupt register bank 0 1111 1111* Mask Interrupt register bank 1 1111 1111* Mask Interrupt register bank 2 1111 1111* Mask Interrupt register bank 3 ...
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... Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT ALLBNK - All Bank control register (address 29h) description BSEL Rev. 02 — 19 July 2006 PCA9698 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... SMBA bit controls the capability of the PCA9698 to respond to a SMBAlert command. – SMBA = 0: PCA9698 does not respond to an Alert Response Address. – SMBA = 1: PCA9698 responds to an Alert Response Address. Bits 5, 6 and 7 are reserved and must be programmed with 0s. • Unused bits (bits and 7) must be programmed with 0s for proper device operation ...
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... STOP command. Remark: The reading of the Device ID can be stopped anytime by sending a NACK command. If the master continues to ACK the bytes after the third byte, the PCA9698 rolls back to the first byte and keeps sending the Device ID sequence until a NACK has been detected. ...
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... To respond to such a command and sequence, the PCA9698 needs to have its IOAC bit (register 2Ah, bit 3) set to 1. Devices that have this bit set not participate in any ‘GPIO All Call’ ...
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... STOP condition has been received. Remark: The PCA9698 has one level of buffers to store 5 bytes of data, and the actual Output Port registers will get updated on the STOP condition. If the master sends more than 5 bytes of data (with AI = 1), the data in the buffer will get overwritten ...
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... Address. ‘SMBus Alert’ message is 2 bytes long and allows the master to determine which device generated the Alert (SMBALERT going LOW). When SMBA bit = 1 (register 2Ah, bit 4), the PCA9698 supports the SMBus Alert function and its INT/SMBALERT pin may be connected as an SMBus Alert signal. ...
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... The robust state machine does not respond until it sees a valid START condition and the 50 ns noise filter will filter out any insertion glitches. The PCA9698 will not cause corruption of active data on the bus nor will the device be damaged or cause damage to devices already on the bus when similar featured devices are being used ...
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... PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT PCA9698 address map AD1 AD0 A6 A5 SCL SCL SDA SDA ...
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... SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT PCA9698 address map …continued AD1 AD0 A6 A5 SCL SCL SDA V 1 ...
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... C-bus advanced I/O port with RESET, OE and INT 2 C-bus Figure SDA SCL data line stable; data valid Figure 12.) S START condition Rev. 02 — 19 July 2006 PCA9698 11). change of data allowed mba607 P STOP condition © Koninklijke Philips Electronics N.V. 2006. All rights reserved. SDA SCL mba608 ...
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... SCL from master 1 S START condition 2 C-bus Rev. 02 — 19 July 2006 13). MASTER MASTER TRANSMITTER/ MULTIPLEXER RECEIVER SLAVE not acknowledge acknowledge 2 8 clock pulse for acknowledgement © Koninklijke Philips Electronics N.V. 2006. All rights reserved. PCA9698 2 I C-BUS 002aaa966 9 002aaa987 ...
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... Philips Semiconductors 8.4 Bus transactions Data is transmitted to the PCA9698 registers using ‘Write Byte’ transfers (see Figure 16, Data is read from the PCA9698 registers using ‘Read Byte’ and ‘Receive Byte’ transfers (see Figure 19 PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT ...
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SDA Output Port START condition R/W register bank 0 is selected write ...
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... 0000 for Polarity Inversion register programming bank 0 R 1000 for Configuration register programming bank 0 10 0000 for Mask interrupt register programming bank 0 DATA BANK 2 A Rev. 02 — 19 July 2006 PCA9698 bank X acknowledge determined by from slave D2, D1 DATA BANK X ...
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... D[5: 1000 for Configuration register bank 0 D[5: 0000 for Mask Interrupt register bank 0 data from register A DATA second byte acknowledge from master Section 7.3 “Command register”). Rev. 02 — 19 July 2006 PCA9698 acknowledge acknowledge from slave from slave A DATA A P STOP condition 00 for output structure configuration programming ...
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... A DATA last byte R/W At this moment master-transmitter becomes master-receiver, and slave-receiver becomes slave-transmitter. no acknowledge 2 PCA9698 I C-bus from master slave address A P R/W STOP condition SMBALERT signal is released (assuming that only one device generated the alert) acknowledge from ...
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... R 'don't care' Rev. 02 — 19 July 2006 PCA9698 acknowledge acknowledge acknowledge from slave(s) from slave(s) from slave(s) A DATA BANK 0 A DATA BANK 1 A acknowledge acknowledge acknowledge from slave(s) from slave(s) ...
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... IO0_1 RESET IO0_2 IO0_3 INT/SMBALERT IO0_4 OE IO0_5 IO1_0 IO3_7 IO4_0 IO4_7 AD2 AD1 AD0 V SS Rev. 02 — 19 July 2006 PCA9698 SUBSYSTEM 1 (e.g., temp. sensor) INT RESET SUBSYSTEM 2 (e.g., counter) A controlled switch enable (e.g., CBT device) B ALARM SUBSYSTEM 3 (e.g., alarm system) 24 LED MATRIX ALPHANUMERIC KEYPAD © ...
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... Limiting values Parameter supply voltage input voltage input current voltage on an input/output pin output current on pin IOx_y supply current ground supply current total power dissipation storage temperature ambient temperature junction temperature Rev. 02 — 19 July 2006 PCA9698 Conditions Min Max 0 0.5 5 0.5 5 ...
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... TSSOP56 package HVQFN56 package I/O SS Rev. 02 — 19 July 2006 PCA9698 Min Typ 2 MHz; - 135 - 250 - 550 - 0.15 - 0.25 - 0.75 [1] - 1.70 0 [2] ...
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... Rev. 02 — 19 July 2006 Min Typ 0 0 3.5 1 0.8 3.3 V 0.4 2 SCL = V ; all I/Os unloaded DD © Koninklijke Philips Electronics N.V. 2006. All rights reserved. PCA9698 Max Unit - +0 +0. 5 002aab956 100 amb ...
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... V (V) OL Fig 31. I/O sink current as a function of LOW-level 002aab961 50 I source (mA 0 Fig 33. I/O source current as a function of HIGH-level Rev. 02 — 19 July 2006 PCA9698 amb + 0.2 0 output voltage ( amb + 0.2 0.4 V ...
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... Rev. 02 — 19 July 2006 400 OL 300 (1) 200 (2) 100 ( sink = 2 sink = sink = 2 sink temperature 002aab964 100 amb © Koninklijke Philips Electronics N.V. 2006. All rights reserved. PCA9698 002aab963 (4) 100 amb ...
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... Min Max [3] 0 100 4.7 - 4.0 - 4 [1] 0.1 3.45 [2] 300 - 250 - 4.7 - 4.0 - [4][6] - 300 [4][6] - 1000 [ output - 80 output - 40 - 250 100 - 250 - - 100 - Rev. 02 — 19 July 2006 PCA9698 2 Fast-mode I C-bus Fast-mode Plus 2 I C-bus Min Max Min 0 400 0 1.3 - 0.5 0.6 - 0.26 0.6 - 0.26 0 0.1 0.9 0. 100 - 50 1.3 - 0.5 0.6 - 0.26 [ 0.1C 300 - b [ 0.1C 300 - ...
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... MSB (A6) (A7 LOW HIGH 1 /f SCL SU;DAT HD;DAT and Rev. 02 — 19 July 2006 PCA9698 of the SCL signal) in order HD;STA SU;STA SU;STO Sr STOP bit 0 acknowledge condition (R/W) (A) ( VD;DAT VD;ACK SU;STO 002aab175 © ...
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... C-bus advanced I/O port with RESET, OE and INT PULSE GENERATOR R = load resistance load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T generators. Rev. 02 — 19 July 2006 PCA9698 ACK or read cycle t rst w(rst) t rst 50 % output off 002aac018 2V DD open V ...
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... JEITA MO-153 Rev. 02 — 19 July 2006 detail 8.3 0.8 0.50 1 0.25 0.08 7.9 0.4 0.35 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2006. All rights reserved. PCA9698 SOT364 0.5 8 0.1 o 0.1 0 ISSUE DATE 99-12-27 03-02- ...
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... 8.1 4.45 8.1 4.45 0.5 6.5 7.9 4.15 7.9 4.15 REFERENCES JEDEC JEITA MO-220 - - - Rev. 02 — 19 July 2006 detail 2 scale 0.5 6.5 0.05 0.1 0.1 0.05 0.3 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2006. All rights reserved. PCA9698 SOT684 ISSUE DATE 01-08-08 02-10- ...
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... 225 Pb-free process - package peak reflow temperatures (from J-STD-020C July 2004) 3 Volume mm < 350 260 260 250 Rev. 02 — 19 July 2006 PCA9698 3 < 350 Volume mm 225 225 Volume mm 350 to Volume mm 2000 ...
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... Suitability of surface mount IC packages for wave and reflow soldering methods [1] [3] , LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN..L Rev. 02 — 19 July 2006 PCA9698 Soldering method Wave Reflow not suitable suitable [4] not suitable suitable suitable suitable [5][6] not recommended suitable ...
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... Inter-Integrated Circuit bus Light Emitting Diode Machine Model PCI Industrial Computer Manufacturers Group Programmable Logic Controller Power-On Reset Pulse Width Modulation Redundant Array of Independent Discs System Management Bus Rev. 02 — 19 July 2006 PCA9698 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Revision history Document ID Release date PCA9698_2 20060719 • Modifications: Descriptive title of data sheet modified (added “Fm+”) • Section 1 “General • Table 12 “PCA9698 address • Table 14 “Static symbols I PCA9698_1 20060224 (9397 750 13751) PCA9698_2 Product data sheet 2 40-bit Fm+ I C-bus advanced I/O port with RESET, OE and INT ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of Koninklijke Philips Electronics N.V. Rev. 02 — 19 July 2006 PCA9698 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... MSK0 to MSK4 - Mask interrupt registers . . . 13 7.4.6 OUTCONF - output structure configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.4.7 ALLBNK - All Bank control register 7.4.7.1 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.4.8 MODE - PCA9698 mode selection register . . 15 7.5 Device ID - PCA9698 ID field . . . . . . . . . . . . . 16 7.6 GPIO All Call 7.7 Output state change on ACK or STOP . . . . . . 17 7.8 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 18 7.9 RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.10 Interrupt output (INT 7.11 SMBus Alert output (SMBALERT ...