pca9698 NXP Semiconductors, pca9698 Datasheet - Page 8

• Manufacturer Part Number: pca9698
• Description: 40-bit Fm+ I2c-bus Advanced I/o Port With Reset, Oe And Int
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PCA9698_2
Product data sheet
Fig 6. Alert Response address
0
0
0
1
7.2 Alert response, GPIO All Call and Device ID addresses
7.3 Command register
1
Three other different addresses can be sent to the PCA9698.
Following the successful acknowledgement of the slave address + R/W bit, the bus
master will send a byte to the PCA9698, which will be stored in the Command register.
The lowest 6 bits are used as a pointer to determine which register will be accessed.
Registers are divided into 2 categories: 5-bank register category, and 1-bank register
category.
Only a command register code with the 7 least significant bits equal to the 28 allowable
values as defined in
undefined command codes will not be acknowledged. At power-up, this register defaults
to 80h, with the AI bit set to ‘1’, and the lowest 7 bits set to ‘0'.
During a write operation, the PCA9698 will acknowledge a byte sent to the OP, PI, IOC,
MSK, OUTCONF, ALLBNK, and MODE registers, but will not acknowledge a byte sent to
the IPx registers since these are read-only registers.
0
Fig 9. Command register
•
•
•
Alert Response address: allows to perform an ‘SMBus Alert’ operation as defined in
the SMBus specification. This address is always used to perform a Read operation.
See
GPIO All Call address: allows to program several Advanced GPIO devices at the
same time. This address is always used to perform a Write operation. See
“GPIO All Call”
Device ID address: allows to read ID information from the device (manufacturer, part
identification, revision). See
information.
002aab938
0
R/W
Section 7.11 “SMBus Alert output (SMBALERT)”
1
Fig 7. GPIO All Call address
1
for more information.
Table 3 “Register summary”
40-bit Fm+ I
1
AI
Rev. 02 — 19 July 2006
1
Auto-Increment
0
0
D5
1
0
Section 7.5 “Device ID - PCA9698 ID field”
D4
1
0
2
register number
C-bus advanced I/O port with RESET, OE and INT
D3
1
0
002aab939
D2
0
0
R/W
D1
0
0
will be acknowledged. Reserved or
D0
0
Fig 8. Device ID address
default at power-up
or after RESET
1
for more information.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
002aab941
1
1
1
PCA9698
1
for more
0
Section 7.6
002aab940
0
R/W
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