adv7322 Analog Devices, Inc., adv7322 Datasheet - Page 77

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adv7322

Manufacturer Part Number
adv7322
Description
Multiformat 11-bit Hdtv Video Encoder
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
MODE 1—MASTER OPTION
(TIMING REGISTER 0 TR0 = X X X X X 0 1 1)
In this mode, the ADV7322 can generate horizontal sync and
odd/even field signals. When HSYNC is low, a transition of the
field input indicates a new frame, i.e., vertical retrace. The blank
signal is optional. When the BLANK input is disabled,
ADV7322 automatically blanks all normally blank lines as per
CCIR-624. Pixel data is latched on the rising clock edge
following the timing signal transitions. HSYNC is output on the
S_HSYNC , BLANK on S_BLANK , and FIELD on S_VSYNC .
HSYNC
BLANK
HSYNC
BLANK
FIELD
FIELD
622
309
DISPLAY
DISPLAY
HSYNC
BLANK
FIELD
PIXEL
DATA
623
310
624
311
EVEN FIELD
ODD FIELD
NTSC = 16 u CLOCK/2
PAL = 12 u CLOCK/2
625
312
Figure 114. SD Timing Mode 1—Odd/Even Field Transitions Master/Slave
ODD FIELD
EVEN FIELD
313
1
314
2
Figure 113. SD Slave Mode 1 (PAL)
315
Rev. PrA | Page 77 of 88
3
VERTICAL BLANK
VERTICAL BLANK
316
4
317
5
318
6
319
7
NTSC = 122 u CLOCK/2
PAL = 132 u CLOCK/2
320
Cb
21
Y
334
22
Cr
Y
DISPLAY
335
23
DISPLAY
336
ADV7322

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