adv7718 Analog Devices, Inc., adv7718 Datasheet - Page 14

• Manufacturer Part Number: adv7718
• Description: Integrated Digital Ccir-601 Pal/ntsc Video Encoder
• Manufacturer: Analog Devices, Inc.

ADV7177/ADV7178
Mode 0 (CCIR-656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7177/ADV7178 is controlled by the SAV (Start Active Video) and EAV (End Active Video) time codes in the pixel data. All
timing information is transmitted using a 4-byte synchronization pattern. A synchronization pattern is sent immediately before and after
each line during active picture and retrace. Mode 0 is illustrated in Figure 7. The HSYNC, FIELD/VSYNC and BLANK (if not
used) pins should be tied high during this mode.
Mode 0 (CCIR-656): Master Option
(Timing Register 0 TR0 = X X X X X 0 0 1)
The ADV7177/ADV7178 generates H, V and F signals required for the SAV (Start Active Video) and EAV (End Active Video) time
codes in the CCIR-656 standard. The H bit is output on the HSYNC pin, the V bit is output on the BLANK pin, and the F bit is
output on the FIELD/VSYNC pin. Mode 0 is illustrated in Figure 8 (NTSC) and Figure 9 (PAL). The H, V and F transitions relative
to the video waveform are illustrated in Figure 10.
V
H
V
F
H
F
260
522
DISPLAY
DISPLAY
NTSC/PAL M SYSTEM
523
261
(525 LlNES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
524
262
PAL SYSTEM
ANALOG
VIDEO
263
525
264
1
ODD FIELD
Y
END OF ACTIVE
VIDEO LINE
C
r
265
EVEN FIELD
2
Y
F
F
4 CLOCK
4 CLOCK
EAV CODE
0
0
266
EVEN FIELD
3
0
0
X
Y
ODD FIELD
267
8
0
4
1
0
8
0
268
1
0
5
VERTICAL BLANK
ANCILLARY DATA
VERTICAL BLANK
269
6
0
0
268 CLOCK
280 CLOCK
F
F
(HANC)
F
F
270
A
B
7
A
B
A
B
271
8
8
0
272
9
1
0
8
0
1
0
SAV CODE
273
10
4 CLOCK
F
F
4 CLOCK
START OF ACTIVE
0
0
VIDEO LINE
0
0
274
X
Y
11
C
b
Y C
1440 CLOCK
1440 CLOCK
r
Y
C
b
283
Y
20
C
r
Y
284
C
b
21
DISPLAY
DISPLAY
285
22