x9258ts24zt1 Intersil Corporation, x9258ts24zt1 Datasheet

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x9258ts24zt1

Manufacturer Part Number
x9258ts24zt1
Description
Low Noise, Low Power, 2-wire Bus, 256 Taps Quad Digital Controlled Potentiometer Xdcp?
Manufacturer
Intersil Corporation
Datasheet
Quad Digital Controlled Potentiometers
(XDCP™)
FEATURES
• Four potentiometers in one package
• 256 resistor taps/pot–0.4% resolution
• 2-wire serial interface
• Wiper resistance, 40Ω typical @ V+ = 5V, V- = -5V
• Four nonvolatile data registers for each pot
• Nonvolatile storage of wiper position
• Standby current <5µA max (total package)
• Power supplies
• 100kΩ, 50kΩ total pot resistance
• High reliability
• 24 Ld SOIC, 24 Ld TSSOP
• Dual supply version of X9259
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
SDA
SCL
WP
—V
—V+ = 2.7V to 5.5V
—V- = -2.7V to -5.5V
—Endurance – 100,000 data changes per bit per
—Register data retention – 100 years
V
V
V+
V-
A0
A1
A2
A3
CC
SS
register
CC
= 2.7V to 5.5V
Interface
Circuitry
Control
and
Data
®
8
1
Data Sheet
R
R
R
R
0
2
0
2
R
R
R
R
1
3
1
3
Register
Counter
Register
Counter
(WCR)
(WCR)
Wiper
Wiper
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Resistor
Array
Pot 1
Pot 0
Low Noise/Low Power/2-Wire Bus/256 Taps
DESCRIPTION
The
potentiometers (XDCP) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
2-wire
associated with it a volatile Wiper Counter Register
(WCR) and 4 nonvolatile Data Registers (DR0:DR3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array though the switches. Power
up recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
V
V
W0
V
V
V
W1
V
H1
L1
L0
H0
/R
/R
/R
/R
/R
August 30, 2006
W0
/R
W1
L1
L0
H1
X9258
H0
All other trademarks mentioned are the property of their respective owners.
bus
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
R
R
R
R
interface.
0
2
0
2
integrates
R
R
R
R
1
3
1
3
Register
Counter
(WCR)
Register
Wiper
Counter
(WCR)
Wiper
Each
4
Resistor
Resistor
digitally
potentiometer
Array
Pot 2
Array
Pot 3
X9258
FN8168.4
V
V
V
V
V
V
L2
controlled
H2
L3
H3
W2
W3
/R
/R
/R
/R
/R
/R
L2
L3
H2
H3
W2
W3
has

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x9258ts24zt1 Summary of contents

Page 1

Data Sheet Quad Digital Controlled Potentiometers (XDCP™) FEATURES • Four potentiometers in one package • 256 resistor taps/pot–0.4% resolution • 2-wire serial interface • Wiper resistance, 40Ω typical @ -5V • Four nonvolatile data ...

Page 2

Ordering Information PART PART NUMBER MARKING X9258US24* X9258US X9258US24Z* (Note) X9258US Z X9258US24I* X9258US I X9258US24IZ* (Note) X9258US ZI X9258UV24 X9258UV X9258UV24I X9258UV I X9258UV24IZ (Note) X9258UV ZI X9258TS24 X9258TS X9258TS24Z (Note) X9258TS Z X9258TS24I X9258TS I X9258TS24IZ (Note) X9258TS ...

Page 3

PIN DESCRIPTIONS Host Interface Pins S C (SCL) ERIAL LOCK The SCL input is used to clock data into and out of the X9258 (SDA) ERIAL ATA SDA is a bidirectional pin used to transfer data into and ...

Page 4

Therefore, the X9258 will be considered a slave device in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW periods (t ...

Page 5

ACK Polling Sequence Nonvolatile Write Command Completed EnterACK Polling Issue START Issue Slave Address ACK No Returned? Yes Further No Operation? Yes Issue Instruction Proceed Instruction Structure The next byte sent to the X9258 contains the instruction and register pointer ...

Page 6

Figure 3. Two-Byte Instruction Sequence SCL SDA The Increment/Decrement command is different from the other commands. Once the command is issued and the X9258 has responded with an acknowledge, the master can ...

Page 7

Figure 4. Three-Byte Instruction Sequence SCL SDA Figure 5. Increment/Decrement Instruction Sequence F SCL SDA ...

Page 8

Figure 7. Acknowledge Response from Receiver SCL from Master Data Output from Transmitter Data Output from Receiver START Figure 8. Detailed Potentiometer Block Diagram Detailed Operation Serial Data Path From Interface Circuitry Register 0 Register 2 If WCR = 00[H] ...

Page 9

The WCR is a volatile register; that is, its contents are lost when the X9258 is powered-down. Although the register is automatically loaded with the value in R0 upon power-up, it should be noted this may be different from the ...

Page 10

Write Data Register (WR) S device type device instruction S T identifier addresses XFR Data Register (DR) to ...

Page 11

SYMBOL TABLE WAVEFORM INPUTS Must be steady May change from Low to High May change from High to Low Don’t Care: Changes Allowed N/A 11 X9258 Guidelines for Calculating Typical Values of Bus Pull-Up Resistors OUTPUTS Will be steady Will ...

Page 12

ABSOLUTE MAXIMUM RATINGS Temperature under bias .................... -65°C to +135°C Storage temperature ......................... -65°C to +150°C Voltage on SDA, SCL or any address input with respect to V ................................. -1V to +7V SS Voltage on V+ (referenced ...

Page 13

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.) Symbol Parameter I V supply current (Nonvol- CC1 CC atile Write supply current (move CC2 CC wiper, write, read current (standby Input ...

Page 14

A.C. TEST CONDITIONS I nput pulse levels V Input rise and fall times 10ns Input and output timing level V EQUIVALENT A.C. LOAD CIRCUIT 5V 1533Ω SDA Output 100pF AC TIMING (Over recommended operating condition) Symbol f Clock frequency SCL ...

Page 15

DCP TIMING Symbol t Wiper response time after the third (last) power supply is stable WRPO t Wiper response time after instruction issued (all load instructions) WRL t Wiper response time from an active SCL/SCK edge (increment/decrement instruction) WRID Note: ...

Page 16

DCP Timing (for All Load Instructions) SCL SDA VWx DCP Timing (for Increment/Decrement Instruction) SCL SDA Wiper Register Address VWx Write Protect and Device Address Pins Timing SCL SDA WP A0 X9258 LSB t WRL Inc/Dec ...

Page 17

APPLICATIONS INFORMATION Basic Configurations of Electronic Potentiometers V R THREE-TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER Application Circuits NONINVERTING AMPLIFIER – (1 OFFSET VOLTAGE ADJUSTMENT R R ...

Page 18

Application Circuits (continued) ATTENUATOR – All -1/2 ≤ G ≤ +1/2 INVERTING AMPLIFIER – ...

Page 19

Thin Shrink Small Outline Package Family (TSSOP (N/2)+ (N/2) B TOP VIEW e C SEATING PLANE b 0.10 0. LEADS SIDE VIEW SEE DETAIL “X” c END VIEW ...

Page 20

... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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