x9258ts24zt1 Intersil Corporation, x9258ts24zt1 Datasheet - Page 13

• Manufacturer Part Number: x9258ts24zt1
• Description: Low Noise, Low Power, 2-wire Bus, 256 Taps Quad Digital Controlled Potentiometer Xdcp?
• Manufacturer: Intersil Corporation

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER UP AND DOWN REQUIREMENT
The are no restrictions on the sequencing of the bias supplies V
their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than V+
and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach their
final value. The V
Notes: (5) This parameter is periodically sampled and not 100% tested.
Symbol
I
I
Symbol
V
t
V
CC1
CC2
I
I
V
Symbol
C
R
SB
I
LO
t
C
t
LI
OL
PUW
IH
PUR
IL
I/O
IN
V
(2) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiom-
(3) MI = RTOT/255 or (V
(4) Max. = all four arrays cascaded together, Typical = individual array resolutions.
(6) t
(7) Sample tested only.
CC
(5)
(5)
(6)
potentiometer.
eter. It is a measure of the error in step size.
(6)
instruction can be issued. These parameters are periodically sampled and not 100% tested.
Minimum endurance
(7)
PUR
V
atile Write)
V
wiper, write, read)
V
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Data retention
CC
CC
CC
Parameter
and t
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3, and SCL)
supply current (Nonvol-
supply current (move
current (standby)
CC
Power-up to initiation of read operation
Power-up to initiation of write operation
V
PUW
CC
Parameter
ramp rate spec is always in effect.
Power up ramp
are the delays required from the time the third (last) power supply (V
13
H
/R
H
—V
L
Parameter
/R
L
Test
)/255, single pot
V
CC
Min.
-0.5
100,000
x 0.7
Min.
100
Typ.
X9258
1
Limits
V
V
CC
CC
Max.
CC
100
0.4
10
10
5
+ 0.1
x 0.3
, V+, and V- provided that all three supplies reach
Max.
Min.
0.2
8
6
Data changes per bit per register
Unit
mA
µA
µA
µA
µA
V
V
V
CC
, V+ or V-) is stable until the specific
f
Other Inputs = V
f
Other Inputs = V
SCL = SDA = V
V
V
I
SCL
SCL
OL
IN
OUT
Max.
years
Unit
= 3mA
Unit
= V
pF
pF
50
= 400kHz, SDA = Open,
= 400kHz, SDA = Open,
1
5
= V
SS
Test Conditions
SS
to V
to V
CC
CC
SS
SS
Test Conditions
CC
, Addr. = V
V
V
I/O
IN
V/ms
Unit
ms
ms
= 0V
= 0V
August 30, 2006
SS
FN8168.4