x9258ts24zt1 Intersil Corporation, x9258ts24zt1 Datasheet - Page 9

• Manufacturer Part Number: x9258ts24zt1
• Description: Low Noise, Low Power, 2-wire Bus, 256 Taps Quad Digital Controlled Potentiometer Xdcp?
• Manufacturer: Intersil Corporation

The WCR is a volatile register; that is, its contents are
lost when the X9258 is powered-down. Although the
register is automatically loaded with the value in R0
upon power-up, it should be noted this may be
different from the value present at power-down.
Data Registers
Each
Registers. These can be read or written directly by the
host and data can be transferred between any of the
four Data Registers and the WCR. It should be noted
all operations changing data in one of these registers
is a nonvolatile operation and will take a maximum of
10ms.
If the application does not require storage of multiple
settings for the potentiometer, these registers can be
used as regular memory locations that could possibly
store system parameters or user preference data.
Instruction Format
Notes: (1) “MACK”/”SACK”: stands for the acknowledge sent by the master/slave.
Read Wiper Counter Register (WCR)
Write Wiper Counter Register (WCR)
Read Data Register (DR)
S
A
R
S
A
R
S
A
R
T
T
T
T
T
T
device type
0 1 0 1
device type
0 1 0 1
device type
0 1 0 1
identifier
identifier
identifier
(2) “A3 ~ A0”: stands for the device addresses sent by the master.
(3) “X”: indicates that it is a “0” for testing purpose but physically it is a “don’t care” condition.
(4) “I”: stands for the increment operation, SDA held high during active SCL phase (high).
(5) “D”: stands for the decrement operation, SDA held low during active SCL phase (high).
potentiometer
A
A
A
3
3
3
addresses
addresses
addresses
device
device
device
A
A
A
2
2
2
A
A
A
1
1
1
has
A
A
A
0
0
0
9
C
C
S
A
C
K
S
A
K
S
A
K
four
1 0 1 1
1 0 0 1 0 0
1 0 1 0 0 0
instruction
instruction
instruction
opcode
opcode
opcode
nonvolatile
DR and WCR
R
1
addresses
addresses
addresses
WCR
WCR
Data
R
0
P
1
P
1
P
1
X9258
P
P
0
0
P
0
S
A
C
K
S
A
C
K
S
A
C
K
W
W
P
P
7
7
(sent by master on SDA)
REGISTER DESCRIPTIONS
Data Registers, (8-Bit), Nonvolatile
Four 8-bit Data Registers for each DCP. (sixteen 8-bit
registers in total).
– {D7~D0}: These bits are for general purpose not
Wiper Counter Register, (8-Bit), Volatile
(sent by slave on SDA)
(MSB)
W
P
7
WP7
WP7
volatile data storage or for storage of up to four
different wiper values. The contents of Data Register
0 are automatically moved to the wiper counter
register on power-up.
(sent by slave on SDA)
NV
W
W
P
P
6
6
W
P
6
wiper position
W
W
P
P
5
5
Data Byte
W
P
5
Data Byte
WP6 WP5 WP4 WP3 WP2 WP1
WP6 WP5 WP4 WP3 WP2 WP1 WP0
W
W
P
P
4
4
NV
W
P
4
W
W
P
P
3
3
W
P
3
W
W
P
P
2
2
NV
W
P
2
W
W
P
P
1
1
W
P
1
W
W
P
P
0
0
NV
W
P
0
M
A
C
K
S
A
C
K
M
A
C
K
O
O
S
T
P
S
T
P
NV
O
S
P
T
NV
NV
August 30, 2006
FN8168.4
(LSB)
WP0
NV