adsp-21267skstz Analog Devices, Inc., adsp-21267skstz Datasheet - Page 17

• Manufacturer Part Number: adsp-21267skstz
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

Power up Sequencing
The timing requirements for DSP startup are given in
Table 8. Power Up Sequencing Timing Requirements (DSP Startup)
1
2
3
4
5
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristic
t
Valid V
Assumes a stable CLKIN signal, after meeting worst-case startup timing of crystal oscillators. Refer to your crystal oscillator manufacturer's datasheet for startup time.
Based on CLKIN cycles
Applies after the power-up sequence is complete. Subsequent resets require a minimum of 4 CLKIN cycles for RESET to be held low in order to properly initialize and
The 4096 cycle count depends on t
RSTVDD
IVDDEVDD
CLKVDD
CLKRST
PLLRST
WRST
CORERST
depending on the design of the power supply subsystem.
Assume a 25 ms maximum oscillator startup time if using the XTAL pin and internal oscillator circuit in conjunction with an external crystal.
propagate default states at all I/O pins.
cycles maximum.
DDINT
/V
DDEXT
assumes that the supplies are fully ramped to their 1.2 and 3.3 volt rails. Voltage ramp rates can vary from microseconds to hundreds of milliseconds
C LK _C FG 1-0
RESET low before V
V
CLKIN valid after V
CLKIN valid before RESET deasserted
PLL control setup before RESET deasserted
Subsequent RESET low pulse width
DSP core reset deasserted after RESET deasserted
V D D EX T
R ST O U T*
V D D IN T
DDINT
R ES E T
C LK IN
SRST
on before V
PRELIMINARY TECHNICAL DATA
specification in
*M U LTIP LE X ED W ITH C LK O U T
t
R S T V D D
DDEXT
DDINT
DDINT
Table
/V
/V
DDEXT
DDEXT
10. If setup time is not met, 1 additional CLKIN cycle may be added to the core reset time, resulting in 4097
Rev. PrA | Page 17 of 44 | January 2004
valid
Figure 6. Power Up Sequencing
on
Table
1
4
8.
t
IV D D E V D D
t
PL L R S T
t
t
C L K V D D
C L K R S T
Min
0
-50
0
10
20
4t
4096t
CK
t
2
3
C O R E R S T
CK
4,5
Max
200
200
ADSP-21267
Unit
ns
ms
ms
µs
µs
ns