dsp56367 Freescale Semiconductor, Inc, dsp56367 Datasheet - Page 53
dsp56367
Manufacturer Part Number
dsp56367
Description
Dsp56367 24-bit Audio Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56367.pdf
(100 pages)
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3.10.3
Freescale Semiconductor
1
2
3
250
251
Bit 13 in the OMR register must be set to enter Asynchronous Arbitration mode.
If Asynchronous Arbitration mode is active, none of the timings in
In order to guarantee timings 250, and 251, it is recommended to assert BG inputs to different 56300 devices (on the same
bus) in a non overlap manner as shown in
No.
BB assertion window from BG input negation.
Delay from BB assertion to BG assertion
RAS
CAS
WR
Arbitration Timings
Characteristics
Table 3-14 Asynchronous Bus Arbitration Timing
177
190
170
162
189
Figure 3-17 DRAM Refresh Access
DSP56367 Technical Data, Rev. 2.1
Figure 3-18
157
.
163
165
Table 3-14
Expression
2 .5* Tc + 5
2 * Tc + 5
External Memory Expansion Port (Port A)
is required.
1, 2, 3
18.3
Min
162
—
150 MHz
Max
21.7
AA0478
—
Unit
ns
ns
3-29
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