saa7110 NXP Semiconductors, saa7110 Datasheet - Page 34

• Manufacturer Part Number: saa7110
• Description: One Chip Front-end 1 Ocf1
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 10 Explanation of bits shown in Table 9
16.3
The I
DMSD-SQP slave receiver (SU 00H to 19H).
16.3.1
Table 11 Increment delay IDEL
Notes
1. A sign bit, designated A08 and internally set to HIGH, indicates values are always negative.
2. The horizontal PLL does not operate in this condition. The system clock frequency is set to a value fixed by the last
1995 Oct 18
STTC
HLCK
FIDT
GLIM
XXX
WIPA
ALTD
CODE
MULTIPLIER
One Chip Front-end 1 (OCF1)
DECIMAL
update and is within 7.1% of the nominal frequency.
2
BIT
C-bus receiver slave address is 9CH/9EH.
195
236
256
I
2
1
C-bus detail
S
UBADDRESS
Status bit for horizontal time constant: LOW = TV time constant; HIGH = VCR time constant.
Status bit for locked horizontal frequency: LOW = locked; HIGH = unlocked.
Identification bit for detected field frequency: LOW = 50 Hz; HIGH = 60 Hz.
Gain value for active luminance is limited (maximum or minimum), active HIGH.
reserved
White peak loop is activated, active HIGH.
Status HIGH: line alternating colour burst has been detected (PAL or SECAM).
Status HIGH: any colour signal has been detected.
outside central counter
(STEP SIZE = 4/LLC)
max. value for 60 Hz
max. value for 50 Hz
DELAY TIME
00 (
DATA BYTE
1024
780
944
4
007 to 000)
(2)
IDEL7
1
0
0
0
IDEL6
1
0
0
0
34
DESCRIPTION
IDEL5
1
1
0
0
CONTROL BITS
IDEL4
1
1
1
0
IDEL3
SAA7110; SAA7110A
1
1
0
0
(1)
IDEL2
1
1
1
0
Product specification
IDEL1
1
0
0
0
IDEL0
1
1
0
0