saa7146a NXP Semiconductors, saa7146a Datasheet - Page 38

• Manufacturer Part Number: saa7146a
• Description: Multimedia Bridge, High Performance Scaler And Pci Circuit Spci
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7.4.8
These registers contain the values for the time out conditions of the PAUSE and CHECK_LATE commands for each task.
If the selected counter value is zero, the time out generation is disabled.
Table 36 RPS time out value
Table 37 RPS_TOx generation
2004 Aug 25
D4
D8
0
0
1
1
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
RPS
V_TOx
V_TO0
C_TO0
V_ABN0
Vsync_Cnt0 27 to 24
PCI_Cnt0
V_TO1
C_TO1
V_ABN1
Vsync_Cnt1 27 to 24
PCI_Cnt1
TIME OUT VALUE
NAME
31
30
29
28
23 to 0
31
30
29
28
23 to 0
0
1
0
1
BIT
C_TOx
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
TYPE
these two bits determine how the RPS_TO0 is generated;
see Table 37
this bit determines which port the V_sync for the time out check
comes from: a logic 1 selects Port A; a logic 0 selects Port B
reserved
this is a 4-bit value which sets the V_sync time out between
1 and 15 V_syncs
this value specifies after how many PCI clocks a time out should
be detected
these two bits determine how the RPS_TO1 is generated;
see Table 37
this bit determines which port the V_sync for the time out check
comes from: a logic 1 selects Port A; a logic 0 selects Port B
reserved
this is a 4-bit value which sets the V_sync time out between
1 and 15 V_syncs
this value specifies after how many PCI clocks a time out should
be detected
no time out check
PCI clock time out check
V_sync time out check
both time out checks
38
RPS_TOx GENERATED FORMAT
DESCRIPTION
Product specification
SAA7146A