saa7130hl-v1 NXP Semiconductors, saa7130hl-v1 Datasheet - Page 35

• Manufacturer Part Number: saa7130hl-v1
• Description: Pci Video Broadcast Decoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 19:
V
[1]
[2]
SAA7130HL_4
Product data sheet
Symbol
Raw DTV/DVB outputs (reuse of video ADCs in DVB/TV applications with TDA8960 and TDA8961 for VSB reception)
Clock input signal X_CLK_IN on pin GPIO18
T
t
t
Clock output signal ADC_CLK on pin V_CLK
C
T
t
t
VSB data output signals with respect to signal ADC_CLK
C
t
t
TS capture inputs with parallel transport streaming (TS-P); e.g. DVB applications
Clock input signal TS_CLK on pin GPIO20; see
T
t
t
Data and control input signals on TS-P port (with respect to signal TS_CLK) on pins GPIO0 to GPIO7, GPIO16, GPIO19 to
GPIO22; see
t
t
TS capture inputs with serial transport streaming (TS-S); e.g. DVB applications
Clock input signal TS_CLK on pin GPIO20; see
T
t
t
Data and control input signals on TS-S port (with respect to signal TS_CLK) on pins GPIO16, GPIO19, GPIO21 and
GPIO22; see
t
t
r
f
r
f
h
PD
r
f
su(D)
h(D)
r
f
su(D)
h(D)
DDD
cy
cy
cy
cy
L
L
Input leakage currents include high-impedance output leakage for all bidirectional buffers with 3-state outputs.
Pins without pull-up resistors must have a 3 mA output current. Pins requiring pull-up resistors must have 6 mA; these are
pins FRAME#, TRDY#, IRDY#, DEVSEL#, SERR#, PERR#, INT_A and STOP#.
= 3.0 V to 3.6 V; V
Characteristics
Parameter
cycle time
duty factor
rise time
fall time
load capacitance
cycle time
duty factor
rise time
fall time
load capacitance
data hold time
propagation delay from
positive edge of
signal ADC_CLK
cycle time
duty factor
rise time
fall time
input data setup time
input data hold time
cycle time
duty factor
rise time
fall time
input data setup time
input data hold time
Figure 16
Figure 16
DDA
= 3.0 V to 3.6 V; T
…continued
Conditions
0.8 V to 2.0 V
2.0 V to 0.8 V
C
0.4 V to 2.4 V
2.4 V to 0.4 V
inverted and not
delayed
inverted and not
delayed
0.8 V to 2.0 V
2.0 V to 0.8 V
0.8 V to 2.0 V
2.0 V to 0.8 V
L
= 40 pF
amb
Figure 16
Figure 16
= 25 C; unless otherwise specified.
Rev. 04 — 11 April 2006
[14] [16]
[13]
[14]
[13]
[13]
Min
27.8
40
-
-
-
27.8
40
-
-
25
5
-
-
40
-
-
2
5
37
40
-
-
2
5
Typ
37
50
-
-
-
-
-
-
-
-
-
-
333
-
-
-
-
-
-
-
-
-
-
-
PCI video broadcast decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
SAA7130HL
Max
333
60
5
5
25
-
60
5
5
50
-
23
-
60
5
5
-
-
-
60
5
5
-
-
Unit
ns
%
ns
ns
pF
ns
%
ns
ns
pF
ns
ns
ns
%
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
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