cy8c20436an-24lqxit Cypress Semiconductor Corporation., cy8c20436an-24lqxit Datasheet - Page 44

• Manufacturer Part Number: cy8c20436an-24lqxit
• Description: Capsense Applications
• Manufacturer: Cypress Semiconductor Corporation.

Glossary
Reference Documents
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■
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Document Number: 001-54459 Rev. *D
Crosspoint connection
Differential non-linearity
Hold time
I
Integral nonlinearity
Latch up current
Power supply rejection ratio (PSRR) The PSRR is defined as the ratio of the change in supply voltage to the corresponding
Scan
Setup time
Signal-to-noise ratio
SPI
2
Technical reference manual for
In-system Serial Programming (ISSP) protocol for 20xx6 –
Host Sourced Serial Programming for 20xx6 devices – AN59389
C
CY8C20xx6
Connection between any GPIO combination via analog multiplexer bus.
Ideally, any two adjacent digital codes correspond to output analog voltages that are exactly
one LSB apart. Differential non-linearity is a measure of the worst case deviation from the
ideal 1 LSB step.
Hold time is the time following a clock event during which the data input to a latch or flip-
flop must remain stable in order to guarantee that the latched data is correct.
It is a serial multi-master bus used to connect low speed peripherals to MCU.
It is a term describing the maximum deviation between the ideal output of a DAC/ADC and
the actual output level.
Current at which the latch up test is conducted according to JESD78 standard ( at 125
degree celsius)
change in output voltage of the device.
The conversion of all sensor capacitances to digital values.
Period required to prepare a device, machine, process, or system for it to be ready to
function.
The ratio between a capacitive finger signal and system noise.
Serial peripheral interface is a synchronous serial data link standard.
devices
AN2026C
CY8C20X36A/46A/66A/96A
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