z80180 ZiLOG Semiconductor, z80180 Datasheet - Page 21
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z80180
Manufacturer Part Number
z80180
Description
Microprocessor Unit
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80180.pdf
(85 pages)
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PS014004-1106
Operation Modes
TXS
RXS
Z80
The Z80180 is descended from two different ancestor processors, ZiLOG's original Z80 and
the Hitachi 64180. The Operating Mode
Control Register (OMCR), illustrated in
certain Z80 and 64180 differences.
M1E (M1 Enable)—
during
When
acknowledge cycle, and the first machine cycle of the
Figure 8. Operating Control Register (OMCR: I/O Address = 3Eh)
®
versus 64180 Compatibility
M1E = 1
RESET
updated, corrupting the transmit operation in progress. Reading
transmit or receive is in progress must be avoided.
CSIO Transmit/Receive
Data Register:
TRDR (8)
CSIO Control Register:
CNTR (8)
Interrupt Request
.
, the
D7
D6 D5 —
M1
This bit controls the
Figure 7. CSIO Block Diagram
output is asserted Low during the opcode fetch cycle, the
Internal Address/Data Bus
— — — —
Figure
M1
output and is set to a
8, can be programmed to select between
Reserved
IOC (R/W)
M1TE (W)
M1E (R/W)
Baud Rate
Generator
φ
NMI
acknowledge.
1
Microprocessor Unit
CKS
TRDR
Architecture
INT0
Z80180
while a
15