mc68hc908qb4 Freescale Semiconductor, Inc, mc68hc908qb4 Datasheet - Page 122

• Manufacturer Part Number: mc68hc908qb4
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Enhanced Serial Communications Interface (ESCI) Module
13.8.1 ESCI Control Register 1
ESCI control register 1 (SCC1):
LOOPS — Loop Mode Select Bit
ENSCI — Enable ESCI Bit
TXINV — Transmit Inversion Bit
M — Mode (Character Length) Bit
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This read/write bit enables loop mode operation. In loop mode the RxD pin is disconnected from the
ESCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver
must be enabled to use loop mode.
This read/write bit enables the ESCI and the ESCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in ESCI status register 1 and disables transmitter interrupts.
This read/write bit reverses the polarity of transmitted data.
This read/write bit determines whether ESCI characters are eight or nine bits long (see
Table
1 = Loop mode enabled
0 = Normal operation enabled
1 = ESCI enabled
0 = ESCI disabled
1 = Transmitter output inverted
0 = Transmitter output not inverted
1 = 9-bit ESCI characters
0 = 8-bit ESCI characters
Enables loop mode operation
Enables the ESCI
Controls output polarity
Controls character length
Controls ESCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
13-4).The ninth bit can serve as a receiver wakeup signal or as a parity bit.
Reset:
Read:
Write:
Setting the TXINV bit inverts all transmitted values including idle, break,
start, and stop bits.
LOOPS
Bit 7
0
Figure 13-9. ESCI Control Register 1 (SCC1)
ENSCI
6
0
MC68HC908QB8 Data Sheet, Rev. 2
TXINV
5
0
NOTE
M
0
4
WAKE
3
0
ILTY
2
0
PEN
1
0
Freescale Semiconductor
Bit 0
PTY
0