mc68hc908qb4 Freescale Semiconductor, Inc, mc68hc908qb4 Datasheet - Page 148

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mc68hc908qb4

Manufacturer Part Number
mc68hc908qb4
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
14.6.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
14.6.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
148
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
Priority
Highest
Lowest
Reset
SWI instruction
IRQ pin
Timer channel 0 interrupt
Timer channel 1 interrupt
Timer overflow interrupt
TIM channel 2 vector
TIM channel 3 vector
ESCI error vector
ESCI receive vector
ESCI transmit vector
SPI receive
SPI transmit
Keyboard interrupt
ADC conversion complete interrupt
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
Source
Table 14-3. Interrupt Sources
MC68HC908QB8 Data Sheet, Rev. 2
NOTE
SCTE, TC
OR, HF,
FE, PE
COCO
OVRF,
MODF
SCRF
SPRF,
CH0F
CH1F
CH2F
CH3F
SPTE
KEYF
IRQF
Flag
TOF
SPRIE, ERRIE
SCTIE, TCIE
ORIE, NEIE,
FEIE, PEIE
IMASKK
Mask
IMASK
SCRIE
CH0IE
CH1IE
CH2IE
CH3IE
SPTIE
TOIE
AIEN
(1)
Register
Table 14-3
Flag
IF10
IF11
IF12
IF13
IF14
IF15
INT
IF1
IF3
IF4
IF5
IF6
IF7
IF9
Freescale Semiconductor
summarizes the
$FFFC–$FFFD
$FFEA–$FFEB
$FFDE–$FFDF
$FFEE–$FFEF
$FFFE–$FFFF
$FFFA–$FFFB
$FFE8–$FFE9
$FFE6–$FFE7
$FFE4–$FFE5
$FFE2–$FFE3
$FFE0–$FFE1
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFF0–$FFF1
Address
Vector

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