mc68hc908qz16 Freescale Semiconductor, Inc, mc68hc908qz16 Datasheet - Page 152

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mc68hc908qz16

Manufacturer Part Number
mc68hc908qz16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MSCAN08 Controller (MSCAN08)
12.13.11 MSCAN08 Transmit Error Counter
This read-only register reflects the status of the MSCAN08 transmit error counter.
12.13.12 MSCAN08 Identifier Acceptance Registers
On reception each message is written into the background receive buffer. The CPU is only signalled to
read the message, however, if it passes the criteria in the identifier acceptance and identifier mask
registers (accepted); otherwise, the message will be overwritten by the next message (dropped).
The acceptance registers of the MSCAN08 are applied on the IDR0 to IDR3 registers of incoming
messages in a bit by bit manner.
For extended identifiers, all four acceptance and mask registers are applied. For standard identifiers only
the first two (CIDMR0/CIDMR1 and CIDAR0/CIDAR1) are applied.
152
Address:
CIDAR0 Address: $0510
CIDAR1 Address: $050511
CIDAR2 Address: $0512
CIDAR3 Address: $0513
Both error counters may only be read when in sleep or soft reset mode.
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
TXERR7
$050F
Bit 7
Bit 7
AC7
Bit 7
AC7
Bit 7
AC7
Bit 7
AC7
0
Figure 12-26. Transmit Error Counter (CTXERR)
Figure 12-27. Identifier Acceptance Registers
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
= Unimplemented
TXERR6
AC6
AC6
AC6
AC6
6
0
6
6
6
6
TXERR5
AC5
AC5
AC5
AC5
(CIDAR0–CIDAR3)
5
0
5
5
5
5
NOTE
TXERR4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
AC4
AC4
AC4
AC4
4
0
4
4
4
4
TXERR3
AC3
AC3
AC3
AC3
3
0
3
3
3
3
TXERR2
AC2
AC2
AC2
AC2
2
0
2
2
2
2
TXERR1
AC1
AC1
AC1
AC1
1
0
1
1
1
1
Freescale Semiconductor
TXERR0
Bit 0
Bit 0
AC0
Bit 0
AC0
Bit 0
AC0
Bit 0
AC0
0

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