mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 218

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Development Support
18.2.2.3 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
18.2.2.4 SIM Break Flag Control Register
The SIM break control register (SBFCR) contains a bit that enables software to clear status bits while the
MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
18.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes. If enabled,
the break module will remain enabled in wait and stop modes. However, since the internal address bus
does not increment in these modes, a break interrupt will never be triggered.
218
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Status bits clearable during break
0 = Status bits not clearable during break
Address: $FE00
Address: $FE03
Reset:
Read:
Reset:
Write:
Read:
Write:
Figure 18-8. SIM Break Flag Control Register (SBFCR)
BCFE
Bit 7
Bit 7
R
R
R
0
Figure 18-7. SIM Break Status Register (SBSR)
= Reserved
= Reserved
R
6
R
6
MC68HC908GR8B Data Sheet, Rev. 3.0
R
5
R
5
R
4
R
4
1. Writing a 0 clears SBSW.
R
3
R
3
R
2
R
2
Note
SBSW
1
0
R
1
(1)
Freescale Semiconductor
Bit 0
Bit 0
R
R

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