mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 133

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC908LD64
Freescale Semiconductor
INT/BREAK
OSCXCLK
IAB
Figure 9-18. Stop Mode Recovery from Interrupt or Break
Rev. 3.0
A break interrupt during stop mode sets the SIM break stop/wait bit
(SBSW) in the SIM break status register (SBSR).
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
STOP +1
R/W
IDB
IAB
System Integration Module (SIM)
STOP ADDR
Figure 9-17. Stop Mode Entry Timing
Figure 9-17
STOP + 2
STOP RECOVERY PERIOD
PREVIOUS DATA
STOP + 2
STOP ADDR + 1
shows stop mode entry timing.
NEXT OPCODE
SP
SP – 1
System Integration Module (SIM)
SAME
SP – 2
SAME
Low-Power Modes
SAME
SP – 3
Data Sheet
SAME
133

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