mc68hc908ey16a Freescale Semiconductor, Inc, mc68hc908ey16a Datasheet - Page 106

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mc68hc908ey16a

Manufacturer Part Number
mc68hc908ey16a
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Internal Clock Generator (ICG) Module
ECGON — External Clock Generator On Bit
ECGS — External Clock Generator Stable Bit
8.7.2 ICG Multiplier Register
N6:N0 — ICG Multiplier Factor Bits
8.7.3 ICG Trim Register
TRIM7:TRIM0 — ICG Trim Factor Bits
106
This read/write bit enables the external clock generator. ECGON can be cleared when the CS and
CMON bits have been clear for at least one bus cycle. ECGON is forced set when the CMON bit or the
CS bit is set. ECGON is forced clear during reset.
This read-only bit indicates when at least 4096 external clock (ECLK) cycles have elapsed since the
external clock generator was enabled. This is not an assurance of the stability of ECLK but is meant
to provide a startup delay. This bit is forced clear when the clock monitor determines ECLK is inactive,
when ECGON is clear, during stop mode with OSCENINSTOP low, or during reset.
These read/write bits change the multiplier used by the internal clock generator. The internal clock
(ICLK) will be:
A value of $00 in this register is interpreted the same as a value of $01. This register cannot be written
when the CMON bit is set. Reset sets this factor to $15 (decimal 21) for default frequency of 6.45 MHz
These read/write bits change the size of the internal capacitor used by the internal clock generator. By
testing the frequency of the internal clock and incrementing or decrementing this factor accordingly,
the accuracy of the internal clock can be improved (see
Characteristics). Incrementing this register by one decreases the frequency by 0.195 percent of the
25 percent (1.613 MHz
1 = External clock generator enabled
0 = External clock generator disabled
1 = 4096 ECLK cycles have elapsed since ECGON was set.
0 = External clock is unstable, inactive, or disabled.
(307.2 kHz
Address: $0037
Address: $0038
Reset:
Reset:
Read:
Write:
Read:
Write:
TRIM7
Bit 7
Bit 7
0
1
25 percent) * N
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Figure 8-10. ICG Multiplier Register (ICGMR)
= Unimplemented
25 percent bus).
TRIM6
Figure 8-11. ICG Trim Register (ICGTR)
N6
6
0
6
0
TRIM5
N5
5
0
5
0
TRIM4
N4
4
1
4
0
TRIM3
20.11.1 Trimmed Internal Clock Generator
N3
3
0
3
0
TRIM2
N2
2
1
2
0
TRIM1
N1
1
0
1
0
Freescale Semiconductor
TRIM0
Bit 0
Bit 0
N0
1
0

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