mc68hc908ey16a Freescale Semiconductor, Inc, mc68hc908ey16a Datasheet - Page 127

no-image

mc68hc908ey16a

Manufacturer Part Number
mc68hc908ey16a
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
PTC[4:0] — Port C Data Bits
12.4.2 Data Direction Register C
Data direction register C determines whether each port C pin is an input or an output. Writing a 1 to a
DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
MCLKEN — MCLK Enable Bit
DDRC[4:0] — Data Direction Register C Bits
Figure 12-9
Freescale Semiconductor
These read/write bits are software-programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on port C data.
This read/write bit enables MCLK, a bus clock frequency clock signal, to be an output signal on PTC2.
If MCLK is enabled, PTC2 is under the control of MCLKEN. Reset clears this bit.
These read/write bits control port C data direction. Reset clears DDRC[4:0] and MCLKEN, configuring
all port C pins as inputs.
1 = MCLK output enabled
0 = MCLK output disabled
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
shows the port C I/O logic.
Address:
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Reset:
Read:
Write:
MCLKEN
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
$0006
Bit 7
0
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Figure 12-8. Data Direction Register C (DDRC)
= Unimplemented
6
0
0
RESET
Figure 12-9. Port C I/O Circuit
5
0
0
DDRC4
NOTE
DDRCx
PTCx
4
0
DDRC3
3
0
DDRC2
2
0
DDRC1
1
0
DDRC0
Bit 0
PTCx
0
Port C
127

Related parts for mc68hc908ey16a