mc68hc908ey16a Freescale Semiconductor, Inc, mc68hc908ey16a Datasheet - Page 210

• Manufacturer Part Number: mc68hc908ey16a
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface A (TIMA) Module
17.5 Low-Power Modes
The WAIT and STOP instructions put the microcontroller unit (MCU) in low power-consumption standby
modes.
17.5.1 Wait Mode
The TIMA remains active after the execution of a WAIT instruction. In wait mode, the TIMA registers are
not accessible by the CPU. Any enabled CPU interrupt request from the TIMA can bring the MCU out of
wait mode.
If TIMA functions are not required during wait mode, reduce power consumption by stopping the TIMA
before executing the WAIT instruction.
17.5.2 Stop Mode
The TIMA is inactive after the execution of a STOP instruction. The STOP instruction does not affect
register conditions or the state of the TIMA counter. TIMA operation resumes when the MCU exits stop
mode.
17.6 TIMA During Break Interrupts
A break interrupt stops the TIMA counter and inhibits input captures.
The system integration module (SIM) controls whether status bits in other modules can be cleared during
the break state. The BCFE bit in the SIM break flag control register (SBFCR) enables software to clear
status bits during the break state.
To allow software to clear status bits during a break interrupt, write a 1 to the BCFE bit. If a status bit is
cleared during the break state, it remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a 0 to the BCFE bit. With BCFE at 0 (its default state),
software can read and write I/O registers during the break state without affecting status bits. Some status
bits have a 2-step read/write clearing procedure. If software does the first step on such a bit before the
break, the bit cannot change during the break state as long as BCFE is at 0. After the break, doing the
second step clears the status bit.
17.7 I/O Signals
Port D shares two of its pins with the TIMA. There is no external clock input to the TIMA prescaler. The
two TIMA channel I/O pins are PTD0/TACH0 and PTD1/TACH1. See
Chapter 12 Input/Output (I/O) Ports
(PORTS).
17.7.1 TIMA Channel I/O Pins (PTD0/TACH0, PTD1/TACH1)
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
PTD0/TACH0 and PTD1/TACH1 can be configured as buffered output compare or buffered PWM pins.
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
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Freescale Semiconductor