mc68hc908rf2 Freescale Semiconductor, Inc, mc68hc908rf2 Datasheet - Page 35

• Manufacturer Part Number: mc68hc908rf2
• Description: M68hc08 Microcontrollers Microcontroller / Transmitter
• Manufacturer: Freescale Semiconductor, Inc

2.5.7 Embedded Program/Erase Routines
MC68HC908RF2 — Rev. 4.0
MOTOROLA
BPR2 — Block Protect Register Bit 2
BPR1 — Block Protect Register Bit 1
BPR0 — Block Protect Register Bit 0
By programming the block protect bits, a portion of the memory will be locked so
that no further erase or program operations may be performed. Programming more
than one bit at a time is redundant. If both bit 1 and bit 2 are set, for instance, the
FLASH address ranges between $7880–$FFFF are locked. If all bits are erased,
then all of the memory is available for erase and program.
The presence of a voltage V
that all of memory, including the block protect register, can be programmed or
erased.
The MC68HC908RF2 monitor ROM contains numerous routines for programming
and erasing the FLASH memory. These embedded routines are intended to assist
the programmer with modifying the FLASH memory array. These routines will
implement the smart programming algorithm as defined in
functions are listed in
This bit protects the memory contents in the address ranges $7900–$7FEF and
$FFF0–$FFFF.
This bit protects the memory contents in the address ranges $7880–$7FEF and
$FFF0–$FFFF.
This bit protects the FLASH memory contents in the address ranges
$7800–$7FEF and $FFF0–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
1 = Address range protected from erase or program
0 = Address range open to erase or program
1 = Address range protected from erase or program
0 = Address range open to erase or program
Freescale Semiconductor, Inc.
For More Information On This Product,
Read/verify a range
Program range of FLASH
Erase range of FLASH
Redundant program FLASH
1. ROMSTRT is defined as the starting address of the monitor ROM in the
memory map. This is address $F000.
Function Description
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Table 2-4. Embedded FLASH Routines
Table 2-4
Memory
TST
on the IRQ pin will bypass the block protection so
RDVRRNG
PRGRNGE
REDPROG
.
ERARNGE
Call
JSR to Address
ROMSTRT + 0
ROMSTRT + 3
ROMSTRT + 6
ROMSTRT + 9
Figure
FLASH 2TS Memory
2-4. The
(1)
Data Sheet
Memory
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