mc68331cpv20b1 Freescale Semiconductor, Inc, mc68331cpv20b1 Datasheet - Page 124

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mc68331cpv20b1

Manufacturer Part Number
mc68331cpv20b1
Description
Mc68331 32 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
5
5.10.2.8 Recommended BDM Connection
5.10.3 Deterministic Opcode Tracking
5-24
STATUS CONTROL BIT
S/C
16
Command and data transfers initiated by the development system should clear bit 16.
The current implementation ignores this bit; however, Freescale reserves the right to
use this bit for future enhancements.
In order to provide for use of development tools when an MCU is installed in a system,
Freescale recommends that appropriate signal lines be routed to a male Berg connec-
tor or double-row header installed on the circuit board with the MCU, as shown in the
following figure.
CPU32 function code outputs are augmented by two supplementary signals to monitor
the instruction pipeline. The instruction pipe (IPIPE) output indicates the start of each
new instruction and each mid-instruction pipeline advance. The instruction fetch
15
Table 5-6 CPU Generated Message Encoding
Bit 16
0
0
1
1
1
Freescale Semiconductor, Inc.
Figure 5-11 BDM Connector Pinout
For More Information On This Product,
Figure 5-10 BDM Serial Data Word
FFFF
FFFF
0000
0001
Data
xxxx
CENTRAL PROCESSING UNIT
RESET
GND
GND
V
Go to: www.freescale.com
DD
DS
Valid Data Transfer
Command Complete; Status OK
Not Ready with Response; Come Again
BERR Terminated Bus Cycle; Data Invalid
Illegal Command
1
3
5
7
9
10
2
4
6
8
DATA FIELD
BERR
BKPT/DSCLK
FREEZE
IFETCH/DSI
IPIPE/DSO
Message Type
32 BERG
USER’S MANUAL
MC68331
0

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