mpc8378e Freescale Semiconductor, Inc, mpc8378e Datasheet - Page 10
mpc8378e
Manufacturer Part Number
mpc8378e
Description
Powerquicc Ii Pro Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC8378E.pdf
(128 pages)
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Power Characteristics
2.2
The device requires its power rails to be applied in a specific sequence in order to ensure proper device
operation. During the power ramp up, before the power supplies are stable and if the I/O voltages are
supplied before the core voltage, there may be a period of time that all input and output pins will actively
be driven and cause contention and excessive current. To avoid actively driving the I/O pins and to
eliminate excessive current draw, apply the core voltages (V
assert PORESET before the power supplies fully ramp up. V
nominal value before GV
supplies, GV
Please note that the SerDes power supply (L[1,2]_nV
(V
The opposite sequence applies to the power down requirements. The I/O supplies must go down first and
immediately followed by the core and PLL supplies.
3
The estimated typical power dissipation for the MPC8378E device is shown in
10
Core Frequency
DD
(MHz)
).
333
400
Power Characteristics
Power Sequencing
DD
, LV
CSB/DDR Frequency
90%
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
V
DD
0
(MHz)
, and OV
333
167
400
266
DD
, LV
DD
Figure 3. Power-Up Sequencing Example
DD
Table 5. MPC8378E Power Dissipation
, and OV
do not have any ordering requirements with respect to one another.
at T
Sleep Power
j
= 65°C (W)
1.45
1.45
1.45
1.45
DD
reach 10% of their value, see
2
Typical Application
DD
at T
I/O Voltage (GVDD, LVDD, and OVDD)
) should follow the same timing as the core supply
j
= 65°C (W)
1.9
1.8
2.0
1.9
DD
DD
Core Voltage (VDD
and AV
and AV
2
Typical Application
at T
1
DD
DD
) before the I/O voltages and
j
= 125°C (W)
must reach 90% of their
0.7 V
3.2
3.0
3.3
3.1
Figure
,
AVDD)
Table
Freescale Semiconductor
3. I/O voltage
5.
t
3
at T
Max Application
j
= 125°C (W)
3.8
3.6
4.0
3.8
4