mpc8378e Freescale Semiconductor, Inc, mpc8378e Datasheet - Page 84
mpc8378e
Manufacturer Part Number
mpc8378e
Description
Powerquicc Ii Pro Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC8378E.pdf
(128 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
mpc8378eCVRAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8378eCVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8378eCVRALG
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
mpc8378eCVRALG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8378eCVRANG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8378eCVRANGA
Manufacturer:
MAXIM
Quantity:
47
Company:
Part Number:
mpc8378eVRAGD
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
mpc8378eVRAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8378eVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
mpc8378eVRAJF
Manufacturer:
FREESCAL
Quantity:
285
High-Speed Serial Interfaces (HSSI)
84
•
SD n _REF_CLK
SD n _REF_CLK
SD n _REF_CLK
SD n _REF_CLK
Single-ended Mode
— The reference clock can also be single-ended. The SD _REF_CLK input amplitude
— The SDn_REF_CLK input average voltage must be between 200 mV and 400 mV.
— To meet the input amplitude requirement, the reference clock inputs might need to be DC or
Figure 56. Differential Reference Clock Input DC Requirements (External DC-Coupled)
Figure 57. Differential Reference Clock Input DC Requirements (External AC-Coupled)
(single-ended swing) must be between 400 mV and 800 mV
SDn_REF_CLK either left unconnected or tied to ground.
shows the SerDes reference clock input requirement for single-ended signaling mode.
AC-coupled externally. For the best noise performance, the reference of the clock could be DC
or AC-coupled into the unused phase (SDn_REF_CLK) through the same source impedance as
the clock input (SDn_REF_CLK) in use.
SD n _REF_CLK
SD n _REF_CLK
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
Figure 58. Single-Ended Reference Clock Input DC Requirements
200 mV < Input Amplitude or Differential Peak < 800 mV
400 mV < SD n _REF_CLK Input Amplitude < 800 mV
200 mV < Input Amplitude or Differential Peak < 800 mV
p-p
(from V
100 mV < V
150
fdafdV
V
V
max
min
min
Freescale Semiconductor
> V
< V
to V
max
V
cm
max
cm
cm
0 V
< V
max
V
– 400m V
+ 400 mV
< 800 mV
< 400 mV
min
cm
) with
Figure 58
Vcm
> 0 V
+ 400 mV