mpc880 Freescale Semiconductor, Inc, mpc880 Datasheet - Page 35
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mpc880
Manufacturer Part Number
mpc880
Description
Mpc885 Powerquicc Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC880.pdf
(88 pages)
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Figure 23
Figure 24
GPCM.
Figure 25
Freescale Semiconductor
Figure 24. Asynchronous External Master Memory Access Timing (GPCM Controlled—ACS = 00)
CSx, WE[0:3],
R/W, BURST
TSIZ[0:1],
provides the timing for the synchronous external master access controlled by the GPCM.
provides the timing for the asynchronous external master memory access controlled by the
provides the timing for the asynchronous external master control signals negation.
CLKOUT
Figure 23. Synchronous External Master Access Timing (GPCM Handled—ACS = 00)
TSIZ[0:1],
OE, GPLx,
A[0:31],
CLKOUT
A[0:31],
BS[0:3]
R/W
CSx
Figure 25. Asynchronous External Master—Control Signals Negation Timing
AS
CSx
TS
AS
MPC885/MPC880 PowerQUICC™ Hardware Specifications, Rev. 4
B40
B39
B41
B40
B42
B43
B22
B22
Bus Signal Timing
35