gc80c520g CORERIVER Semiconductor, gc80c520g Datasheet - Page 92

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gc80c520g

Manufacturer Part Number
gc80c520g
Description
Eprom / Rom / Romless Based 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
R/W(0)
P2.7
P2
P4
P4SEL
IE
EA
Appendix B :
-
-
Quasi bi-directional port with internal pull-up resistors.
General I/O and address output during access to external memory.
Quasi bi-directional port with internal pull-up resistors.
0 = Internal Pull-up resistor is ON (Default) / 1= OFF
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
(A8h) : Interrupt Enable Register
(A0h) : Port 2 Register
(A5h) : Port 4 Register
R/W(0)
EADC
P2.6
(A6h) : Port 4 Pull-up Control Register
-
-
: Enable/Disable all interrupts.
: ADC interrupt enable.
: Timer 2 interrupt enable.
: Serial port interrupt enable.
: Timer 1 interrupt enable.
: External interrupt 1 enable.
: Timer0 interrupt enable.
: External interrupt 0 enable.
R/W(0)
P2.5
ET2
-
-
R/W(0)
P2.4
ES
-
-
P4SEL.3
R/W(1)
R/W(0)
R/W(0)
P2.3
P4.3
SFR Description [A0h ~ B7h]
ET1
P4SEL.2
R/W(1)
R/W(0)
R/W(0)
P2.2
P4.2
EX1
P4SEL.1
R/W(1)
R/W(0)
R/W(0)
P2.1
P4.1
ET0
P4SEL.0
R/W(1)
R/W(0)
R/W(0)
P2.0
P4.0
EX0
SADDR.7
R/W(1)
R/W(0)
P3.7
R(1)
SADDR
P3
IPH
-
Programmed with the given or broadcast address assigned to serial port
Quasi bi-directional port with internal pull-up resistors.
When alternative function enabled, P3.X must be “1”.
PADCH
PT2H
PSH
PT1H
PX1CH
PT0H
PX0H
(B0h) : Port 3 Register
(B7h) : Interrupt Priority High Register
SADDR.6
R/W(1)
R/W(0)
R/W(0)
PADCH
P3.6
(A9h) : Slave Address Register
: ADC interrupt priority high.
: Timer 2 interrupt priority high.
: Serial Port (UART) interrupt priority high.
: Timer 1 interrupt priority high.
: External interrupt 1 priority high.
: Timer 0 interrupt priority high.
: External interrupt 0 priority high.
SADDR.5
R/W(0)
R/W(1)
R/W(0)
PT2H
P3.5
(4/9)
SADDR.4
R/W(0)
R/W(1)
R/W(0)
P3.4
PSH
MiDAS1.0 Family
SADDR.3
R/W(0)
R/W(1)
R/W(0)
PT1H
P3.3
SADDR.2
R/W(0)
R/W(1)
R/W(0)
PX1H
P3.2
SADDR.1
R/W(0)
R/W(1)
R/W(0)
PT0H
P3.1
SADDR.0
R/W(0)
R/W(1)
R/W(0)
PX0H
P3.0
[92]

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