gc80c521a CORERIVER Semiconductor, gc80c521a Datasheet - Page 141

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gc80c521a

Manufacturer Part Number
gc80c521a
Description
Flash / Isp / Iap 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
P0TYPE.7 P0TYPE.6 P0TYPE.5 P0TYPE.4 P0TYPE.3 P0TYPE.2 P0TYPE.1 P0TYPE.0
P1TYPE.7 P1TYPE.6 P1TYPE.5 P1TYPE.4 P1TYPE.3 P1TYPE.2 P1TYPE.1 P1TYPE.0
P2TYPE.7 P2TYPE.6 P2TYPE.5 P2TYPE.4 P2TYPE.3 P2TYPE.2 P2TYPE.1 P2TYPE.0
P3TYPE.7 P3TYPE.6 P3TYPE.5 P3TYPE.4 P3TYPE.3 P3TYPE.2 P3TYPE.1 P3TYPE.0
P4TYPE.7 P4TYPE.6 P4TYPE.5 P4TYPE.4 P4TYPE.3 P4TYPE.2 P4TYPE.1 P4TYPE.0
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1) R/W(1)
P0TYP
P1TYP
P2TYP
P3TYP
P4TYP
Appendix B :
0 = Push-pull Output / 1 = Open-drain Output (Default)
0 = Push-pull Output / 1 = Open-drain Output (Default)
0 = Push-pull Output / 1 = Open-drain Output (Default)
0 = Push-pull Output / 1 = Open-drain Output (Default)
0 = Push-pull Output / 1 = Open-drain Output (Default)
(D9h) : Port 0 Type Register
(DAh) : Port 1 Type Register
(DBh) : Port 2 Type Register
(DCh) : Port 3 Type Register
(DDh) : Port 4 Type Register
SFR Description [D9h ~ DFh]
R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
AD_EN AD_REQ AD_END
ADIV2
ADCON
ADCSEL
AD_EN : ADC Ready Enable
AD_REQ : ADC Start.
AD_END : Current ADC Status.
ADCF : ADC Interrupt Flag.
SAR[1:0] : Low Bits of ADC Result Value. (Total 10 bits)
ADIV[2:0]
ADCS[4:0]
ADIV1
(DEh) : ADC Control & ADC Result Low Register
(DFh) : ADC Clock and MUX Selection Register
Cleared by H/W when AD_END goes to 1 from 0.
0 = ADC is running now.
User must check the ADCF instead of AD_END.
Must be cleared by S/W.
[000] : FSYS / 2.
[001] : FSYS/ 4.
[010] : FSYS / 8.
[011] : FSYS / 16.
[100] : FSYS / 32.
[101] : FSYS / 64.
[110] : FSYS / 128.
[111] : FSYS / 256.
[00000] : ADC0.0 channel selection.
[00001] : ADC0.1 channel selection. (continued)
: ADC clock selection.
: ADC channel selection
ADIV0
R(1)
(15/19)
R/W(0)
ADCS4
ADCF
MiDAS1.0B Family
ADCS3
-
ADCS2
-
R/W(0) R/W(0)
ADCS1
SAR1
ADCS0
SAR0
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