gc80c521a CORERIVER Semiconductor, gc80c521a Datasheet - Page 61

no-image

gc80c521a

Manufacturer Part Number
gc80c521a
Description
Flash / Isp / Iap 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
6.12. I2C : Overview
Addressing I2C devices
Transfer Acknowledge
SDA
SCL
10-bit / Extended 15-bit Address Format
7-bit Address Format
Slave-Receiver generates an acknowledge bit after Master transfers each byte. If not, Master aborts the transfer.
Master-Receiver generates an acknowledge bit after Slave transfers each byte except last byte.
Transfer Wait State
1) If Slave needs to delay the transmission of the next byte, it can hold the SCL ‘low’
2) Master must enter the wait state, if the SCL is held ‘low’.
3) When Slave releases the SCL, Master starts the transfer again.
S
S
S
A15
A14
1
MSb
A7
A13
MSb
2
A12
A6
SLA
SLA
3~6
A11
A10
A5
7
A9
Slave Address (SLA)
Not A8
R/W
R/W /ACK
Slave holds SCL
8
A4
/ACK
9
A3
Wait State
A7
A6
Slave releases SCL
A2
A5
1
A4
2
SLA
Data
A1
A3
MiDAS1.0B Family
3~8
Not A0
A2
LSb
R/W
LSb
Not ACK
/ACK
A1
ACK
9
/ACK
A0
/ACK
P
[61]
[61]

Related parts for gc80c521a