adau1373 Analog Devices, Inc., adau1373 Datasheet - Page 138

• Manufacturer Part Number: adau1373
• Description: Low Power Codec With Speaker And Headphone Amplifier Adau1373
• Manufacturer: Analog Devices, Inc.

ADAU1373
Bits
[3:0]
Bit Name
DPLLB_NDIV
Settings
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Description
DPLLB Clock Divider Setting. DPLLB source selection can be set to one of
the following: Digital Audio Interface A/B/C bit clock/frame clock or
GPIO1/2/3/4 or Master Clock Input 1/2.
DPLLB output clock frequency: DPLLB input
DPLLB output clock frequency: DPLLB input clock frequency × 1024
DPLLB output clock frequency: DPLLB input clock frequency × 512
DPLLB output clock frequency: DPLLB input clock frequency × 256
DPLLB output clock frequency: DPLLB input clock frequency × 128
DPLLB output clock frequency: DPLLB input clock frequency × 64
DPLLB output clock frequency: DPLLB input clock frequency × 32
DPLLB output clock frequency: DPLLB input clock frequency × 16
DPLLB output clock frequency: DPLLB input clock frequency × 8
DPLLB output clock frequency: DPLLB input clock frequency × 4
DPLLB output clock frequency: DPLLB input clock frequency × 2
Reserved
Reserved
Reserved
Reserved
Reserved
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Reset
0x0
Access
RW