adau1373 Analog Devices, Inc., adau1373 Datasheet - Page 57

• Manufacturer Part Number: adau1373
• Description: Low Power Codec With Speaker And Headphone Amplifier Adau1373
• Manufacturer: Analog Devices, Inc.

FIXED FUNCTION DSP (FDSP)
Figure 104 shows the fixed function DSP input and output
connections, as well as the available processing blocks. The
FDSP works at a 128 × f
output channels.
The five high-pass filters are available at the input channels to
help remove the dc offset. In addition, the following blocks are
provided to enhance the signal:
•
•
•
•
•
•
HIGH-PASS FILTERS (HPFs)
The ADAU1373 provides five fully programmable HPFs in front
of the data path and one configurable HPF following the FDSP
blocks.
The five fully programmable HPFs (called pre-HPFs) are used
to remove the dc content or the low frequency components from
the input signals. An additional HPF, located at the end of the
FDSP chain and called the post-HPF, is designed to remove dc
or low frequency components that may be introduced by the
nonlinear processing in the FDSP blocks. All of these HPFs are
first-order IIR with changeable 3 dB cutoff frequencies.
Pre-HPFs
All coefficients of the five pre-HPFs are in 11-bit format and fully
programmable. Each coefficient takes up two register addresses,
from Register 0xB3 to Register 0xBC. For each coefficient, the
first register is the first eight MSB bits, and the second register is
ALC
MDRC or three full-band DRCs
Seven-band EQ
3D enhancement
Bass enhancement
High-pass filter
INTERFACE A
INTERFACE B
INTERFACE C
DIGITAL MIC
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
ADC
S
clock rate and has five input and
Figure 104. Fixed Function DSP (FDSP) Input and Output Connections and Available Processing Blocks
DE-EMPHASIS
DE-EMPHASIS
DE-EMPHASIS
ALC
1
2
PRE
HPF
PRE
HPF
PRE
HPF
PRE
HPF
PRE
HPF
MDRC
FDSP_PRE_
MIX_MUX
Rev. 0 | Page 57 of 296
7-BAND
BIQUAD
NOTE: EITHER MDRC OR DRC CAN BE
FDSP_DIN0
FDSP_DIN1
FDSP_DIN2
FDSP_DIN3
FDSP_DIN4
USED AT A TIME
the last three LSB bits. Register 0xBD provides an individual
control bit for each filter enable or disable.
The pre-HPF frequency transfer function is as follows:
where Parameter a is determined by the cutoff frequency, f
and related to the sample rate, f
calculate Parameter a:
For the pre-HPF, the coefficients are quantized to 10 bits, so
that the decimal integer values of these coefficients are as
follows:
Pre-HPF Working Example
If the required cutoff frequency for the first pre-HPF is 900 Hz
and the sampling rate is 48 kHz, then
Therefore, set Bits[7:0] in Register 0xB3, Register 0xB5,
Register 0xB7, Register 0xB9, and Register 0xBB as the MSBs
and Bits[2:0] in Register 0xB4, Register 0xB6, Register 0xB8,
Register 0xBA, and Register 0xBC as the LSBs for the pre-HPFs.
3D
FDSP
W
a =
a
w
a =
a
a
H
INT
INT
HEX
C
(
C
z
= 2 × π × f
= 2 × π × f
1 −
= round(a × 2048)
1−
= round(a × 2048) = 1820
)
= 71C
=
FDSP_DOUT0
FDSP_DOUT1
FDSP_DOUT2
FDSP_DOUT3
FDSP_DOUT4
cos
cos
1
sin
sin
BASS
+
2
w
w
a
w
w
c
c
×
c
c
C
1
C
/f
/f
= 0.8886221
−
1
S
S
−
a
= 0.1178097
FDSP_POST_
z
×
−
MIX_MUX
z
1
DRC
−
1
1
S
. Use the following equations to
2
3
INTERFACE A
OUTPUT
INTERFACE B
OUTPUT
INTERFACE C
OUTPUT
DAC1 INPUT
DAC2 INPUT
POST
HPF
ADAU1373
C
,