tp3076 National Semiconductor Corporation, tp3076 Datasheet - Page 11

• Manufacturer Part Number: tp3076
• Description: Combo Ii Programmable Pcm Codec/filter For Isdn And Digital Phone Applications
• Manufacturer: National Semiconductor Corporation

PCM INTERFACE TIMING
t
t
t
SERIAL CONTROL PORT TIMING
f
t
t
t
t
t
t
t
t
t
t
t
t
t
INTERFACE LATCH TIMING
t
t
t
Symbol
DFD
SDB
HBD
CCLK
WCH
WCL
RC
FC
HCS
HSC
SSC
SSC0
SDC
HCD
DCD
DSD
DDZ
SLC
HCL
DCL
Timing Specifications
Unless otherwise noted, limits printed in BOLD characters are guaranteed for V
+70˚C by correlation with 100% electrical testing at T
tests and/or product design and characterization. All signals referenced to GND. Typicals specified at V
T
tion for test methods information.
Note 14: Applies only to MCLK Frequencies ≥ 1.536 MHz. At 512 kHz a 50:50
A
= 25˚C. All timing parameters are measured at V
Delay Time, FS
High to Data Valid
Setup Time, D
Valid to BCLK Low
Hold Time, BCLK
Low to D
Frequency of CCLK
Period of CCLK High
Period of CCLK Low
Rise Time of CCLK
Fall Time of CCLK
Hold Time, CCLK Low
to CS Low
Hold Time, CCLK
Low to CS High
Setup Time, CS
Transition to CCLK Low
Setup Time, CS
Transition to CCLK High
Setup Time, CI
Data In to CCLK Low
Hold Time, CCLK
Low to CO Invalid
Delay Time, CCLK High
to CO Data Out Valid
Delay Time, CS Low
to CO Valid
Delay Time, CS or 9th CCLK
High to CO High Impedance
Setup Time, IL to
CCLK 8 of Byte 1
Hold Tme, IL Valid from
8th CCLK Low (Byte 1)
Delay Time CCLK8 of
Byte 2 to IL
R
1 Invalid
R
Parameter
X/R
1
(Continued)
OH
Load = 100 pF Plus 2 LSTTL Loads,
Applies if FS
BCLK Rising Edge in Non-Delayed Data
Mode Only
Measured from V
Measured from V
Measured from V
Measured of V
CCLK1
CCLK8
To Insure CO is Not Enabled
for Single Byte
Load = 100 pF Plus 2 LSTTL Loads
Applies Only if Separate
CS Used for Byte 2
Applies to Earlier of CS
High or 9th CCLK High
Interface Latch Inputs Only
Interface Latch Outputs Only
C
A
L
= 25˚C. All other limits are assured by correlation with other production
= 2.0V and V
= 50 pF
11
±
2% Duty Cycle must be used.
X/R
IH
Conditions
OL
Rises Later Than
to V
IH
IL
IL
= 0.7V. See Definitions and Timing Conventions sec-
to V
to V
to V
IL
IH
IH
IH
CC
= +5V
±
5%; V
BB
Min
160
160
100
100
30
15
10
60
60
50
50
15
50
= −5V
CC
Typ
= +5V, V
±
5%; T
2048
Max
200
80
50
50
80
80
80
A
www.national.com
BB
= 0˚C to
= −5V,
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns